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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電機工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88525
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dc.contributor.advisor郭斯彥zh_TW
dc.contributor.advisorSy-Yen Kuoen
dc.contributor.author徐瑋廷zh_TW
dc.contributor.authorWei-Ting Hsuen
dc.date.accessioned2023-08-15T16:41:24Z-
dc.date.available2023-11-09-
dc.date.copyright2023-08-15-
dc.date.issued2023-
dc.date.submitted2023-07-31-
dc.identifier.citation[1] A. Dhavlle, R. Hassan, M. Mittapalli, and S. M. P. Dinakarrao, “Design of hardware trojans and its impact on cps systems: A comprehensive survey,” in 2021 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2021, pp. 1–5.
[2] S. Bhunia, M. S. Hsiao, M. Banga, and S. Narasimhan, “Hardware trojan attacks: Threat analysis and countermeasures,” Proceedings of the IEEE, vol. 102, no. 8, pp. 1229–1247, 2014.
[3] Y. Su, H. Shen, R. Lu, and Y. Ye, “A stealthy hardware trojan design and corresponding detection method,” in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1–6.
[4] H. Salmani, “Cotd: Reference-free hardware trojan detection and recovery based on controllability and observability in gate-level netlist,” IEEE Transactions on Information Forensics and Security, vol. 12, no. 2, pp. 338–350, 2016.
[5] K. Huang and Y. He, “Trigger identification using difference-amplified controllability and dynamic transition probability for hardware trojan detection,” IEEE Transactions on Information Forensics and Security, vol. 15, pp. 3387–3400, 2019.
[6] M. M. Breunig, H.-P. Kriegel, R. T. Ng, and J. Sander, “Lof: identifying densitybased local outliers,” in Proceedings of the 2000 ACM SIGMOD international conference on Management of data, 2000, pp. 93–104.
[7] H. Salmani, M. Tehranipoor, and R. Karri, “On design vulnerability analysis and trust benchmarks development,” in 2013 IEEE 31st International Conference on Computer Design (ICCD), 2013, pp. 471–474.
[8] B. Shakya, T. He, H. Salmani, D. Forte, S. Bhunia, and M. Tehranipoor, “Benchmarking of hardware trojans and maliciously affected circuits,” Journal of Hardware and Systems Security, vol. 1, no. 1, pp. 85–102, 2017.
[9] J. Cruz, Y. Huang, P. Mishra, and S. Bhunia, “An automated configurable trojan insertion framework for dynamic trust benchmarks,” in 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2018, pp. 1598–1603.
[10] R. Mukherjee and R. S. Chakraborty, “Novel hardware trojan attack on activation parameters of fpga-based dnn accelerators,” IEEE Embedded Systems Letters, 2022.
[11] J. Ye, Y. Hu, and X. Li, “Hardware trojan in fpga cnn accelerator,” in 2018 IEEE 27th Asian Test Symposium (ATS), 2018, pp. 68–73.
[12] P. Dharmadhikari, A. Raju, and R. Vemuri, “Detection of sequential trojans in embedded system designs without scan chains,” in 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2018, pp. 678–683.
[13] C. H. Kok, C. Y. Ooi, M. Moghbel, N. Ismail, H. S. Choo, and M. Inoue, “Classification of trojan nets based on scoap values using supervised learning,” in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, pp. 1–5.
[14] C. H. Kok, C. Y. Ooi, M. Inoue, M. Moghbel, S. Baskara Dass, H. S. Choo, N. Ismail, and F. A. Hussin, “Net classification based on testability and netlist structural features for hardware trojan detection,” in 2019 IEEE 28th Asian Test Symposium (ATS), 2019, pp. 105–1055.
[15] M. Priyadharshini and P. Saravanan, “An efficient hardware trojan detection approach adopting testability based features,” in 2020 IEEE International Test Conference India, 2020, pp. 1–5.
[16] P.-Y. Lo, C.-W. Chen, W.-T. Hsu, C.-W. Chen, C.-W. Tien, and S.-Y. Kuo, “Semisupervised trojan nets classification using anomaly detection based on scoap features,” in 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, pp. 2423–2427.
[17] L. Goldstein and E. Thigpen, “Scoap: Sandia controllability/observability analysis program,” in 17th Design Automation Conference, 1980, pp. 190–196.
[18] F. Brglez, “On testability analysis of combinational circuits,” in Proc. International Symp. Circuits and Systems, 1984, pp. 221–225.
[19] R. Bennetts, C. Maunder, and G. Robinson, “Comelot: a computer-aided measure for logic testability,” IEE Proceedings E (Computers and Digital Techniques), vol. 128, no. 5, pp. 177–189, 1981.
[20] J. Grason, “Tmeas, a testability measurement program,” in 16th Design Automation Conference. IEEE, 1979, pp. 156–161.
[21] N. Zhang, Z. Lv, Y. Zhang, H. Li, Y. Zhang, and W. Huang, “Novel design of hardware trojan: A generic approach for defeating testability based detection,” in 2020 IEEE 19th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom). IEEE, 2020, pp. 162–173.
[22] Z. He, X. Xu, and S. Deng, “Discovering cluster-based local outliers,” Pattern recognition letters, vol. 24, no. 9-10, pp. 1641–1650, 2003.
[23] Y. Zhao, Z. Nasrullah, and Z. Li, “Pyod: A python toolbox for scalable outlier detection,” Journal of Machine Learning Research, vol. 20, no. 96, pp. 1–7, 2019. [Online]. Available: http://jmlr.org/papers/v20/19-011.html
[24] Savir, “Good controllability and observability do not guarantee good testability,”IEEE Transactions on Computers, vol. C-32, no. 12, pp. 1198–1200, 1983.
[25] R. S. Chakraborty, F. Wolff, S. Paul, C. Papachristou, and S. Bhunia, “Mero: A statistical approach for hardware trojan detection,” in Cryptographic Hardware and Embedded Systems-CHES 2009: 11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings. Springer, 2009, pp. 396–410.
[26] A. Mondal, S. Karmakar, M. H. Mahalat, S. Roy, B. Sen, and A. Chattopadhyay,“Hardware trojan detection using transition probability with minimal test vectors,”ACM TransactionsonEmbeddedComputingSystems, vol. 22, no. 1, pp. 1–21, 2022.
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/88525-
dc.description.abstract近年隨著積體電路產業的外包以及全球化,第三方供應商很容易在積體電路中植入惡意的硬體木馬,成為相關產業的重大隱患。為了避開功能驗證,硬體木馬通常在邏輯閘層網表上至少擁有一個具非常低觸發機率之觸發信號,基於這種特性,以往的研究使用不平衡的可控性作為檢測硬體木馬之特徵,假定具有不平衡可控性的信號總是伴隨著低觸發機率。然而,本論文發現了一種新型硬體木馬插入之方法,經此方法插入後的木馬具有低觸發機率但平衡的可控性,這使得當前基於不平衡可控性的偵測方式在此種情況下無法偵測到插入之木馬。為了解決這個問題,我們提出了一種基於COP的檢測方法,並使用無監督的異常分析來檢測硬體木馬。該方法不僅能成功檢測到所提出的新型硬體木馬,且能檢測Trusthub上的580個木馬電路。實驗結果顯示,本論文提出的硬體木馬檢測器優於其他檢測器,在580個測試電路上實現了整體100%的真陽性率和0.37%的假陽性率。zh_TW
dc.description.abstractIn recent years, the security threat posed by Hardware Trojans (HTs) has escalated to a critical level within the integrated circuits (ICs) industry. The widespread outsourcing and globalization of semiconductor design and manufacturing phases have made ICs highly vulnerable to hardware Trojan insertion by malicious third-party vendors, which in turn exposes them to significant security risks. To evade functional verification, HTs tend to include at least one trigger signal at the gate-level netlist with a very low transition probability. Earlier research has utilized imbalanced controllability as a feature to detect HTs, assuming that signals with imbalanced controllability are always accompanied by low transition probability. However, this study has found out a way to create a new type of HT that has low transition probability but balanced controllabilty, thereby thwarting the previous detection methods. Consequently, existing imbalanced controllability detectors are inadequate in this scenario. To address this limitation, we propose a COP-based detection method that uses unsupervised anomaly analysis to detect HTs. Our proposed method can effectively detect not only the proposed HT but also the 580 Trojan benchmarks on Trusthub. Empirical results demonstrate that our proposed detector outperforms other detectors, achieving an overall 100% TPR and 0.37% FPR on the 580 benchmarks.en
dc.description.provenanceSubmitted by admin ntu (admin@lib.ntu.edu.tw) on 2023-08-15T16:41:24Z
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dc.description.provenanceMade available in DSpace on 2023-08-15T16:41:24Z (GMT). No. of bitstreams: 0en
dc.description.tableofcontentsAcknowledgements i
摘要 ii
Abstract iii
Contents v
List of Figures vii
List of Tables ix
Chapter 1 Introduction 1
1.1 Background 1
1.2 Contribution 3
1.3 Thesis Outline 3
Chapter 2 Preliminaries 4
2.1 Hardware Trojan 4
2.2 Testability Measures 6
2.2.1 SCOAP 7
2.2.2 COP 9
2.3 Correlation between Controllability and Transition Probability 11
Chapter 3 Related Works 13
3.1 COTD 13
3.2 Imbalanced Controllability Detectors 16
3.3 Summary 19
Chapter 4 Proposed Method 21
4.1 HT Insertion Against Imbalanced Controllability 21
4.2 HT Trigger Detection Based on COP and CBLOF 24
Chapter 5 Experimental Results 27
5.1 Experimental Setup 27
5.2 Validating the Proposed Method 28
5.3 Evaluating Performance of the Proposed Detector on TrustHUB Benchmarks 32
Chapter 6 Discussion 35
6.1 Limitations 35
6.2 Performance Analysis in Large-Scale Circuits 36
6.3 Detection Rates 36
6.4 Effectiveness of Proposed Trojan 37
Chapter 7 Conclusion 39
References 41
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dc.language.isoen-
dc.subject硬體安全zh_TW
dc.subject可測試性分析zh_TW
dc.subject硬體木馬zh_TW
dc.subject不平衡之可控性zh_TW
dc.subject無監督異常偵測zh_TW
dc.subjecthardware Trojanen
dc.subjecttestability analysisen
dc.subjectimbalanced controllabilityen
dc.subjecthardware securityen
dc.subjectunsupervised anomaly detectionen
dc.title針對平衡控制特性之硬體木馬偵測方法zh_TW
dc.titleHardware Trojan Detection Method against Balanced Controllability Trigger Designen
dc.typeThesis-
dc.date.schoolyear111-2-
dc.description.degree碩士-
dc.contributor.oralexamcommittee陳英一;顏嗣鈞;雷欽隆;林振緯zh_TW
dc.contributor.oralexamcommitteeIng-Yi Chen;Hsu-chun Yen;Chin-Laung Lei;Jenn-Wei Linen
dc.subject.keyword硬體安全,硬體木馬,可測試性分析,不平衡之可控性,無監督異常偵測,zh_TW
dc.subject.keywordhardware security,hardware Trojan,testability analysis,imbalanced controllability,unsupervised anomaly detection,en
dc.relation.page44-
dc.identifier.doi10.6342/NTU202302097-
dc.rights.note未授權-
dc.date.accepted2023-08-02-
dc.contributor.author-college電機資訊學院-
dc.contributor.author-dept電機工程學系-
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