應用等效定理的電感萃取宏觀建模演算法EPRIMA

Abstract

隨著IC設計產業的蓬勃發展，電路的複雜度日益上升。2.5D/3D晶片和系統級封裝技術成為優化晶片系統的重要因素。然而，其複雜的非曼哈頓繞線和多層結構使得電氣分析變得更加複雜，並且由於芯片間連線的尺度問題，寄生電感的影響變得不可忽視。此外，矽智財的重要性也越來越受到重視。儘管電路布局往往難以回溯，但隨著人工智慧（AI）產業的快速成長，我們無法排除矽智財遭到非法侵權的風險。基於這兩個問題，我們提出了一種可應用於非曼哈頓繞線、具有高精準度並能有效保護矽智財的電感萃取演算法。該演算法利用了電磁學的經典理論中的等效定理的概念。我們可以利用等效平面通過固定的計算次數來計算大量線路對指定導體的互感總值。同時，由於等效平面將布局資訊轉換為平面上的等效電流和磁流，使原始布局無法被回溯，從而達到保護知識產權的效果。

With the blooming development of the IC design industry, the complexity of circuits is increasing. 2.5D/3D chips and system-level packaging technology have become important factors in optimizing chip systems. However, their complex non-Manhattan routing and multilayer structures make electrical analysis more challenging, and the impact of parasitic inductance cannot be ignored due to the scale of inter-chip connections.In addition, the importance of silicon intellectual property (IP) is being increasingly recognized. Although circuit layouts are often difficult to trace, with the rapid growth of the artificial intelligence (AI) industry, we cannot exclude the risk of illegal infringement of silicon IP. Based on these two issues, we propose an inductance extraction algorithm that is applicable to non-Manhattan routing, achieves high precision, and effectively protects silicon IP.The algorithm utilizes the concept of equivalence principle from classical electromagnetic theory. We can use an equivalence surface to calculate the total mutual inductance between a large number of conductors and a specified conductor using a fixed number of computations. Additionally, the conversion of layout information into equivalence electric and magnetic currents on the equivalence surface makes it impossible to trace back to the original layout, thereby achieving the goal of protecting intellectual property rights.