Please use this identifier to cite or link to this item:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/86610Full metadata record
| ???org.dspace.app.webui.jsptag.ItemTag.dcfield??? | Value | Language |
|---|---|---|
| dc.contributor.advisor | 高振宏 | zh_TW |
| dc.contributor.advisor | Cheng-Hung Kao | en |
| dc.contributor.author | 陳昱安 | zh_TW |
| dc.contributor.author | Yu-An Chen | en |
| dc.date.accessioned | 2023-03-20T00:06:20Z | - |
| dc.date.available | 2023-12-26 | - |
| dc.date.copyright | 2022-08-22 | - |
| dc.date.issued | 2022 | - |
| dc.date.submitted | 2002-01-01 | - |
| dc.identifier.citation | [1] C. Y. Liu, C. Chen, and K. N. Tu, “Electromigration in Sn–Pb solder strips as a function of alloy composition,” Journal of Applied Physics, vol. 88, no. 10, pp. 5703-5709, 2000.
[2] M. Lu, D.-Y. Shih, P. Lauro, C. Goldsmith, and D. W. Henderson, “Effect of Sn grain orientation on electromigration degradation mechanism in high Sn-based Pb-free solders,” Applied Physics Letters, vol. 92, no. 21, 2008. [3] C. C. Wei, C. F. Chen, P. C. Liu, and C. Chen, “Electromigration in Sn–Cu intermetallic compounds,” Journal of Applied Physics, vol. 105, no. 2, 2009. [4] W. Koh, B. Lin, and J. Tai, "Copper pillar bump technology progress overview." pp. 1-5. [5] Y.-S. Tang, Y.-J. Chang, and K.-N. Chen, “Wafer-level Cu–Cu bonding technology,” Microelectronics Reliability, vol. 52, no. 2, pp. 312-320, 2012. [6] Y.-S. Lai, M.-K. Shih, C.-C. Lee, and T. H. Wang, “Structural design guideline to minimize extreme low-k delamination potential in 40nm flip-chip packages,” Microelectronics Reliability, vol. 52, no. 11, pp. 2851-2855, 2012. [7] K. Sakuma, K. Tunga, B. Webb, K. Ramachandran, M. Interrante, H. Liu, M. Angyal, D. Berger, J. Knickerbocker, and S. Iyer, "An enhanced thermo-compression bonding process to address warpage in 3D integration of large die on organic substrates." pp. 318-324. [8] T. H. Kim, M. M. R. Howlader, T. Itoh, and T. Suga, “Room temperature Cu–Cu direct bonding using surface activated bonding method,” Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, vol. 21, no. 2, pp. 449-453, 2003. [9] C. S. Tan, D. F. Lim, X. F. Ang, J. Wei, and K. C. Leong, “Low temperature CuCu thermo-compression bonding with temporary passivation of self-assembled monolayer and its bond strength enhancement,” Microelectronics Reliability, vol. 52, no. 2, pp. 321-324, 2012. [10] C. M. Liu, H. W. Lin, Y. S. Huang, Y. C. Chu, C. Chen, D. R. Lyu, K. N. Chen, and K. N. Tu, “Low-temperature direct copper-to-copper bonding enabled by creep on (111) surfaces of nanotwinned Cu,” Sci Rep, vol. 5, pp. 9734, May 12, 2015. [11] G. Gao, L. Mirkarimi, T. Workman, G. Fountain, J. Theil, G. Guevara, P. Liu, B. Lee, P. Mrozek, M. Huynh, C. Rudolph, T. Werner, and A. Hanisch, “Low Temperature Cu Interconnect with Chip to Wafer Hybrid Bonding,” in 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 2019, pp. 628-635. [12] G. Gao, J. Theil, G. Fountain, T. Workman, G. Guevara, C. Uzoh, D. Suwito, B. Lee, K. Bang, and R. Katkar, "Die to Wafer Hybrid Bonding: Multi-Die Stacking with Tsv Integration." pp. 1-8. [13] Y. Kagawa, N. Fujii, K. Aoyagi, Y. Kobayashi, S. Nishi, N. Todaka, S. Takeshita, J. Taura, H. Takahashi, and Y. Nishimura, "Novel stacked CMOS image sensor with advanced Cu2Cu hybrid bonding." pp. 8.4. 1-8.4. 4. [14] J. J. Ong, W. L. Chiu, O. H. Lee, C. W. Chiang, H. H. Chang, C. H. Wang, K. C. Shie, S. C. Yang, D. P. Tran, K. N. Tu, and C. Chen, “Low-Temperature Cu/SiO2 Hybrid Bonding with Low Contact Resistance Using (111)-Oriented Cu Surfaces,” Materials (Basel), vol. 15, no. 5, Mar 3, 2022. [15] A. He, T. Osborn, S. A. Bidstrup Allen, and P. A. Kohl, “Low-Temperature Bonding of Copper Pillars for All-Copper Chip-to-Substrate Interconnections,” Electrochemical and Solid-State Letters, vol. 9, no. 12, 2006. [16] H. T. Hung, Z. D. Ma, P. S. Shih, J. H. Huang, L. Y. Kao, C. Y. Yang, V. Renganathan, C. L. Kao, Y. C. Hung, and C. R. Kao, “Highly uniform microfluidic electroless interconnections for chip stacking applications,” Electrochimica Acta, vol. 376, 2021. [17] L. Abrantes, and J. Correia, “On the mechanism of electroless Ni‐P plating,” Journal of the Electrochemical Society, vol. 141, no. 9, pp. 2356, 1994. [18] K. H. Krishnan, S. John, K. Srinivasan, J. Praveen, M. Ganesan, and P. Kavimani, “An overall aspect of electroless Ni-P depositions—A review article,” Metallurgical and materials transactions A, vol. 37, no. 6, pp. 1917-1926, 2006. [19] J. Lin, C. Wang, S. Wang, Y. Chen, W. He, and D. Xiao, “Initiation electroless nickel plating by atomic hydrogen for PCB final finishing,” Chemical Engineering Journal, vol. 306, pp. 117-123, 2016. [20] Y. Shacham-Diamand, V. Dubin, and M. Angyal, “Electroless copper deposition for ULSI,” Thin Solid Films, vol. 262, no. 1-2, pp. 93-103, 1995. [21] H.-C. Koo, R. Saha, and P. A. Kohl, “Copper Electroless Bonding of Dome-Shaped Pillars for Chip-to-Package Interconnect,” Journal of The Electrochemical Society, vol. 158, no. 12, 2011. [22] 葉非凡, “無電解銅電鍍液的安定劑與配位劑成份分析及鍍液穩定性研究,” Department of Applied Chemistry Chaoyang University of Technology, Taiwan, 2013. [23] F. Hanna, Z. A. Hamid, and A. A. Aal, “Controlling factors affecting the stability and rate of electroless copper plating,” Materials Letters, vol. 58, no. 1-2, pp. 104-109, 2004. [24] H. HONMA, and T. FUJINAMI, “Extraneous Deposition of Electroless Copper,” Circuit Technology, vol. 6, no. 5, pp. 259-265, 1991. [25] K. Zhu, Y. Chen, C. Ma, W. He, C. Wang, S. Wang, G. Zhou, Z. Wang, Y. Liu, Y. Huang, W. Zhang, and Y. Sun, “Anisotropic growth of electroless nickel‑phosphorus plating on fine sliver lines for L-shape terminal electrode structure of chip inductor,” Applied Surface Science, vol. 496, 2019. [26] C. Chao, X. Jin, and X. Fan, “Effect of network structure on the bubble dislodgment and pressure distribution in microfluidic networks with multiple bifurcations,” Chemical Engineering Science, vol. 209, 2019. [27] C. Chao, X. Jin, L. Teng, A. A. Stokes, and X. Fan, “Bubble Dislodgment in a Capillary Network with Microscopic Multichannels and Multibifurcation Features,” Langmuir, vol. 35, no. 8, pp. 3194-3203, Feb 26, 2019. [28] A. Younes, I. Hassan, and L. Kadem, “Investigation of Bubble Frequency for Slug Flow Regime in a Uniformly Heated Horizontal Microchannel,” Journal of Heat Transfer, vol. 139, no. 6, 2017. [29] A. J. Calderon, J. B. Fowlkes, and J. L. Bull, “Bubble splitting in bifurcating tubes: a model study of cardiovascular gas emboli transport,” J Appl Physiol (1985), vol. 99, no. 2, pp. 479-87, Aug, 2005. [30] M. T. Kreutzer, F. Kapteijn, J. A. Moulijn, C. R. Kleijn, and J. J. Heiszwolf, “Inertial and interfacial effects on pressure drop of Taylor flow in capillaries,” AIChE Journal, vol. 51, no. 9, pp. 2428-2440, 2005. [31] M. Mohammadi, and K. V. Sharp, “The Role of Contact Line (Pinning) Forces on Bubble Blockage in Microchannels,” J Fluids Eng, vol. 137, no. 3, pp. 0312081-312087, Mar, 2015. [32] A. Kawahara, P.-Y. Chung, and M. Kawaji, “Investigation of two-phase flow pattern, void fraction and pressure drop in a microchannel,” International journal of multiphase flow, vol. 28, no. 9, pp. 1411-1435, 2002. [33] J. Yue, G. Chen, and Q. Yuan, “Pressure drops of single and two-phase flows through T-type microchannel mixers,” Chemical Engineering Journal, vol. 102, no. 1, pp. 11-24, 2004. [34] C. W. Wong, T. S. Zhao, Q. Ye, and J. G. Liu, “Transient Capillary Blocking in the Flow Field of a Micro-DMFC and Its Effect on Cell Performance,” Journal of The Electrochemical Society, vol. 152, no. 8, 2005. [35] S. J. Grafner, J. H. Huang, Y. A. Chen, P. S. Shih, C. H. Huang, and C. R. Kao, “Key steps from laboratory towards mass production: Optimization of electroless plating process through numerical simulation,” in 2022 IEEE 72th Electronic Components and Technology Conference (ECTC), 2022, pp. 539-547. [36] T. Osborn, A. He, N. Galiba, and P. A. Kohl, “All-Copper Chip-to-Substrate Interconnects Part I. Fabrication and Characterization,” Journal of The Electrochemical Society, vol. 155, no. 4, 2008. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/86610 | - |
| dc.description.abstract | 隨者科技日新月異的進步,人們所追求的電子產品將會越來越高效與輕薄。而近年來,由於矽的物理限制,電晶體密度難以上升,在這種情況下,3D堆疊封裝技術 (3D IC technology)被視為最有可能突破此困境之良藥。但在三維堆疊封裝技術中,接點尺寸日益縮小,錫球接點不敷使用,銅將取代錫球,成為未來最具可靠度之接合材料。由於銅之熔點較高,需要高溫及高壓才能完成銅銅對接(Cu-Cu bonding),而此嚴苛的接合條件往往伴隨著接點可靠度的降低、介電層之損傷與試片翹曲的議題。在此原因下,低溫低壓甚至室溫無壓的銅銅對接技術,已然成為眾多學者首要研究目標。在諸多具潛力之接合技術中,微流道無電鍍接合技術(microfluidic electroless plating interconnection)無疑是最亮眼的候選人,此技術擁有許多優點,例如:室溫及無外加壓力之製程、不須抽真空以及對於表面粗造度無嚴苛要求。然而在這完美的一面背後亦有些許值得改善之點,便是1. 如何找出能夠均勻上鍍之參數以及2. 如何消除接合後之孔洞。此論文將針對這兩個議題提出可能之解決辦法。
本研究將分為兩部分,氣泡排除模型建立和水平側對側接合技術開發(side-by-side interconnection)。在第一部分中,由於氫氣為無電鍍銅反應之副產物,且將會對於上鍍結果造成嚴重的影響,氫氣泡排除已成為首要條件。此條件下,排除氫氣泡之模型將被提出,此模型可預測在不同之銅柱陣列中排氫參數將有何變化,且能減少尋找良好排氫參數所花費的時間,使微流道無電鍍接合技術將變得更具競爭力。借助於該模型,氣泡排除壓力與柱陣列尺寸之間的關係將被揭發,3 個不同的柱陣列也被使用來驗證該模型是否與實驗結果相符。此外,我們將探討上鍍情況和壓力之間的相關性,以確保該模型的可行性。 第二部分將著重於水平側對側接合技術開發,此技術為解決垂直頭對頭接合(head-to-head interconnection)接點中孔洞問題的潛在解決方案。側對側接合具有許多優點,例如:低孔洞率、不均勻柱高的耐受度等。經由適當之參數調整,將可達成高均勻之側對側接合,且無電鍍銅各向異性生長的機制亦在此論文中被探討。另外,我們通過上下試片的輕微旋轉來驗證側對側接合是否具有錯位接合之能力。在此論文文末,我們對側對側接合進行了接合強度試驗,並計算出接合強度約為110 MPa。 | zh_TW |
| dc.description.abstract | Nowadays, people are pursuing a lighter, faster, and smaller electronic devices. Under this situation, the pitch of interconnection decreases significantly and Cu had become the most reliable interconnection medium. However, the best bonding method of direct Cu-Cu interconnection has not been identified yet. Among all the candidates, electroless plating interconnection has the greatest potential due to its low working temperature, pressure-free environment, absence of vacuum ambient, and flexibility on surface roughness. These advantages might increase the throughput of electroless interconnection and make it as a rising star. Highly uniform bonding result can be achieved by using microfluidic electroless interconnection (MELI) process in 2021. However, there are still some challenges when applying this process, for example: how to find good plating parameter and how to eliminate the voids in the joints. This thesis will provide 2 possible solutions to these challenges.
This study will be divided into 2 parts, model of bubble dislodgment and horizontal side-by-side interconnection. In the first part, a model of bubble dislodgment is proposed to predict the plating parameter when changing the pattern of pillar array and make MELI process more competitive. With the assistance of this model, the relation between bubble dislodging pressure and dimension of pillar array will be revealed. Also, 3 different pillar arrays were used to validate this model. Furthermore, we will discover the correlation between plating condition and pressure to ensure the applicability of this model. The second part will focus on the horizontal side-by-side interconnection which is a potential solution of void issue in the joints of vertical head-to-head interconnection. Side-by-side interconnection possess many advantages, for example: low void ratio, tolerance of non-uniform pillar height, and so on. A highly uniform bonding result of side-by-side interconnection will be demonstrated and the mechanism of anisotropic growth will also be discussed. Besides, we exam the tolerance of misalignment through slight rotation of top and bottom die. In the end, bond shear test was conducted and the bond strength of side-by-side interconnection is about 110 MPa. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-20T00:06:20Z (GMT). No. of bitstreams: 1 U0001-0808202213211000.pdf: 11276238 bytes, checksum: 1904c40cb586042175ec17527f9c4c0f (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | 誌謝 i
中文摘要 ii ABSTRACT iv CONTENTS vi LIST OF FIGURES viii LIST OF TABLES xiii Chapter 1 Introduction 1 1.1 3D IC Technology 1 1.2 Recent Cu-Cu Interconnection Technology 3 1.3 Electroless Plating Interconnection Technology 9 Chapter 2 Literature review 11 2.1 Microfluidic Electroless Plating Interconnection 11 2.2 Reaction Mechanism and Extraneous Deposition of Electroless Cu Plating 20 2.3 Anisotropic Growth Behavior of Electroless Plating 23 2.4 Theory of Bubble Dislodgment 26 Chapter 3 Motivation and Objectives of Model of Bubble Dislodgment Prediction 30 Chapter 4 Experiment 31 4.1 Fabrication of Chips with Cu Pillar Array 31 4.2 Test Vehicle Preparation and Die Stacking 34 4.3 Fabrication of PDMS Fixture 36 4.4 Pressure Measuring and Electroless Plating 37 4.5 In-situ Observation of Hydrogen Bubbles 39 4.6 Validation of Model 40 Chapter 5 Result and Discussion of Model of Bubble Dislodgment Prediction 41 5.1 Development of Model 41 5.2 Designation of Flow Profile 46 5.3 Validation of The Model 49 5.4 Plating Result and Pressure 53 5.5 Cross-section of Bonded Cu pillar pair 58 Chapter 6 Motivation and Objectives of Side-by-side Interconnection 60 Chapter 7 Result and Discussion of Side-by-side Interconnection 64 7.1 Bonding Result of Side-by-side Interconnection 64 7.2 Bubble Dislodgment Comparison 67 7.3 Cross-section of Bonded Cu Pillar Pairs 69 7.4 Misalignment 70 7.5 Anisotropic Growth Behavior 72 7.6 Mechanical Property 76 Chapter 8 Conclusions 78 REFERENCE 80 | - |
| dc.language.iso | en | - |
| dc.subject | 氣泡排除模型建立 | zh_TW |
| dc.subject | 無電鍍銅各向異性生長 | zh_TW |
| dc.subject | 水平側對側接合技術 | zh_TW |
| dc.subject | 氣泡排除模型建立 | zh_TW |
| dc.subject | 微流道無電鍍接合技術 | zh_TW |
| dc.subject | 無電鍍銅各向異性生長 | zh_TW |
| dc.subject | 水平側對側接合技術 | zh_TW |
| dc.subject | 微流道無電鍍接合技術 | zh_TW |
| dc.subject | Electroless Cu plating | en |
| dc.subject | side-by-side interconnection | en |
| dc.subject | Anisotropic electroless Cu growth | en |
| dc.subject | Electroless Cu plating | en |
| dc.subject | Chip-to-chip interconnection | en |
| dc.subject | Low-temperature and pressureless direct Cu-Cu bonding | en |
| dc.subject | Bubble dislodgment | en |
| dc.subject | Low-temperature and pressureless direct Cu-Cu bonding | en |
| dc.subject | Chip-to-chip interconnection | en |
| dc.subject | Anisotropic electroless Cu growth | en |
| dc.subject | side-by-side interconnection | en |
| dc.subject | Bubble dislodgment | en |
| dc.title | 排氫模型建立與無電鍍銅之側對側接合技術開發 | zh_TW |
| dc.title | Development of Model for Bubble Dislodgment and Cu-Cu Side-by-side Interconnection Using Controlled Electroless Cu Plating | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 110-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 高金利;顏怡文 | zh_TW |
| dc.contributor.oralexamcommittee | Jing-Li Kao;Yee-Wen Yen | en |
| dc.subject.keyword | 微流道無電鍍接合技術,氣泡排除模型建立,水平側對側接合技術,無電鍍銅各向異性生長, | zh_TW |
| dc.subject.keyword | Chip-to-chip interconnection,Low-temperature and pressureless direct Cu-Cu bonding,Electroless Cu plating,Bubble dislodgment,side-by-side interconnection,Anisotropic electroless Cu growth, | en |
| dc.relation.page | 84 | - |
| dc.identifier.doi | 10.6342/NTU202202140 | - |
| dc.rights.note | 同意授權(全球公開) | - |
| dc.date.accepted | 2022-08-08 | - |
| dc.contributor.author-college | 工學院 | - |
| dc.contributor.author-dept | 材料科學與工程學系 | - |
| dc.date.embargo-lift | 2027-01-01 | - |
| Appears in Collections: | 材料科學與工程學系 | |
Files in This Item:
| File | Size | Format | |
|---|---|---|---|
| ntu-110-2.pdf Until 2027-01-01 | 11.01 MB | Adobe PDF |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.
