請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/86543完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 謝馬利歐(Mario Hofmann) | |
| dc.contributor.author | Nguyen Thi Hai Yen | en |
| dc.contributor.author | 阮氏海燕 | zh_TW |
| dc.date.accessioned | 2023-03-20T00:02:10Z | - |
| dc.date.copyright | 2022-08-18 | |
| dc.date.issued | 2022 | |
| dc.date.submitted | 2022-08-13 | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/86543 | - |
| dc.description.abstract | 二維材料為其中一類原子級厚度的結構,憑藉著它們許多卓越的性質,例如:不同二維材料種類間之能隙選擇範圍極廣、載子遷移率高、能耗低、無懸鍵、可撓曲性以及高硬度等,使其有潛力成為未來電子學技術發展的核心。為了實際展現並應用這些特性,這篇論文旨在解決以下幾點於該領域關鍵的難題。 首先,生長成的二維材料往往有著極高密度的晶格缺陷,包含了晶界、原子空缺、雜質等等。這些缺陷都會拉低元件的性能效率。為此,我們設計了一種製程來避免這類缺陷。透過薄膜誘導之受抑蝕刻 (FIFE) 這項步驟,我們可以在適合的”檢測用基板”上具象化原子級的缺陷。往後元件的製備便可直接在檢測基板上進行,並且用相應的幾何構型避開這些缺陷。接著,元件可再被轉印到目標的基板上。這套流程不僅提供提升元件表現的可能性,同時也開拓了其發展二維材料穿戴式電子元件的機會。 另外,這篇論文也探索了幾個新穎的元件概念來有效發揮二維材料們的獨特性質。我們展示了簡單的平面憶阻器不僅能在生長用基板上直接置備,還有著對稱、無束縮之遲滯迴圈以及運行穩定性。上述全新的現象可歸因於表面顆粒與硫空缺遷移特徵一致,而這也保證了先進電子元件量產的可能性。最後,我們研究了一個複雜的異質結構元件,該元件以多種二維材料垂直向整合而成。透過其設計面向的優化,我們得以探索在接面處各組件之載子遷移行為。這項技術使我們實現了二維金屬-絕緣層-金屬 (MIM) 電晶體中熱激電子之收集,也點亮了未來發展量產與極快電子學技術之道路 | zh_TW |
| dc.description.abstract | Two-dimensional materials are a class of atomically thin structures, that have great potential to be the basis of future electronics, due to their exceptional properties such as wide choice of the band gap, high mobility, low power consumption, and dangling bond free, flexibility, and robustness. To realize these opportunities of 2D materials, this dissertation is addressing several important challenges. First, as grown 2D material exhibits a high density of lattice defects including grain boundaries, vacancies, impurities, etc. which deteriorate device performance. We devise a fabrication process that can avoid such defects. Through a film-induced frustrated etching (FIFE) step, atomic defects can be visualized on a suitable “detection substrate”. Device fabrication is conducted directly on this substrate, permitting the tailoring of device geometry to avoid defective regions. Finally, the complete device is transferred onto a target substrate. This approach not only provides a route towards enhancing the performance of 2D materials devices but also demonstrates the ability to produce 3D and flexible devices which opens up new opportunities in 2D materials-based wearable electronics Second, several new device concepts are explored to take advantage of the unique properties of 2D materials. We demonstrate a simple lateral memristor fabricated directly on the grown substrate. The devices show a symmetric pinched hysteresis loop and stable operation. The novel phenomenon is ascribed to the migration of surface particles in concert with sulfur vacancies and it provides a route toward scalable fabrication of advanced electronic devices. Finally, we study the fabrication of a complex heterojunction device based on the vertical integration of multiple 2D materials. Through design optimization, we are able to investigate the charge transport in each component of the junction. This platform allows us to demonstrate the hot electron collection in 2D MIM transistors and open up routes for future scalable, ultra-fast electronics. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-20T00:02:10Z (GMT). No. of bitstreams: 1 U0001-0908202222370800.pdf: 7896003 bytes, checksum: b3c6371ab8b93ba04fa3f21cb60b9e31 (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | Certificate of Dissertation Approval from the Oral Defense Committee i Acknowledgment ii Abstract (English version) iii Abstract (Chinese version) v List of contents vii List of figures x CHAPTER 1. Introduction 1 1.1. History of two-dimensional materials 1 1.2. Physics of two-dimensional materials 4 1.2.1. Electronics properties of graphene 4 1.2.2. Electronics properties of transition metal dichalcogenides 8 1.3. Opportunities of 2D materials in future electronics 14 1.3.1. Field Effect Transistor based on 2D materials 15 1.3.2. Memristor based on 2D materials 18 1.3.3. 2D Heterojunction 26 1.4. The challenges of using 2D materials in the electronic application 38 1.5. The outline of the dissertation 42 1.6. Materials preparation 42 1.6.1. CVD growth of graphene 43 1.6.2. CVD growth of MoS2, WS2 43 1.6.3. Transferring processes for CVD materials 43 CHAPTER 2. Defectiveness Visualization of 2D materials 45 2.1. Introduction of film-induced frustrated etching method 45 2.2. Structural defects: visualization and characterization 49 2.3. Effect of line defects on device performance 54 2.4. Realization of the method for future electronics 57 CHAPTER 3. Memristor based on 2D material 62 3.1. Memristive phenomenon in CVD WS2 device 63 3.2. Investigation of the mechanism via photoluminescence 66 3.3. Investigation memristive behavior via Atomic force microscopy 72 3.4. Temperature dependence measurement 74 3.5. Performance of memristor 76 CHAPTER 4. Vertical transistors based on integrated 2D material heterostructures. 78 4.1. Device fabrication 79 4.2. Optical characterization of heterojunction 82 4.3. Electrical characterization of heterojunctions 86 4.3.1. The studies of components: bottom graphene, top graphene, and MoS2 86 4.3.2. The studies of heterojunctions 89 CHAPTER 5. Conclusion and Outlook 96 Publication and conferences 100 References 101 | |
| dc.language.iso | en | |
| dc.subject | TMDs | zh_TW |
| dc.subject | 二維材料 | zh_TW |
| dc.subject | TMDs | zh_TW |
| dc.subject | 二維材料 | zh_TW |
| dc.subject | 異質結 | zh_TW |
| dc.subject | 憶阻器 | zh_TW |
| dc.subject | 電晶體 | zh_TW |
| dc.subject | 異質結 | zh_TW |
| dc.subject | 憶阻器 | zh_TW |
| dc.subject | 電晶體 | zh_TW |
| dc.subject | 2D materials | en |
| dc.subject | heterojunction | en |
| dc.subject | memristor | en |
| dc.subject | transistor | en |
| dc.subject | TMDs | en |
| dc.subject | 2D materials | en |
| dc.subject | heterojunction | en |
| dc.subject | memristor | en |
| dc.subject | TMDs | en |
| dc.subject | transistor | en |
| dc.title | 先進二維材料元件之整合於未來電子技術應用 | zh_TW |
| dc.title | Integration of advanced 2D material device for future electronics | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 110-2 | |
| dc.description.degree | 博士 | |
| dc.contributor.oralexamcommittee | 陳永芳(Yang-Fang Chen),張顏暉(Yuan-Huei Chang),謝雅萍(Ya-Ping Hsieh),邱聖貴(Sheng-Kuei Chiu) | |
| dc.subject.keyword | 二維材料,TMDs,電晶體,憶阻器,異質結, | zh_TW |
| dc.subject.keyword | 2D materials,TMDs,transistor,memristor,heterojunction, | en |
| dc.relation.page | 112 | |
| dc.identifier.doi | 10.6342/NTU202202228 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2022-08-15 | |
| dc.contributor.author-college | 理學院 | zh_TW |
| dc.contributor.author-dept | 應用物理研究所 | zh_TW |
| dc.date.embargo-lift | 2024-12-31 | - |
| 顯示於系所單位: | 應用物理研究所 | |
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