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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 林坤佑 | zh_TW |
| dc.contributor.advisor | Kun-You Lin | en |
| dc.contributor.author | 廖宏博 | zh_TW |
| dc.contributor.author | Hong-Bo Liao | en |
| dc.date.accessioned | 2023-03-19T23:42:23Z | - |
| dc.date.available | 2024-09-30 | - |
| dc.date.copyright | 2023-07-11 | - |
| dc.date.issued | 2022 | - |
| dc.date.submitted | 2002-01-01 | - |
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Svelto, "A PVT-tolerant > 40-dB IRR, 44% fractional-bandwidth ultra-wideband mm-wave quadrature LO generator for 5G networks in 55-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 53, no. 12, pp. 3576-3586, Dec. 2018. [33] Y. -H. Lin, C. -C. Yeh, H. -H. Hsu, J. -H. Tsai and T. -W. Huang, "A 22 — 40 GHz wideband image rejection mixer in 0.18−μm CMOS process," 2019 IEEE Asia-Pacific Microwave Conference (APMC), 2019, pp. 1515-1517. [34] M. -Y. Huang, T. Chi, S. Li, T. -Y. Huang and H. Wang, "A 24.5–43.5-GHz ultra-compact CMOS receiver front end with calibration-free instantaneous full-band image rejection for multiband 5G massive MIMO," in IEEE Journal of Solid-State Circuits, vol. 55, no. 5, pp. 1177-1186, May 2020. [35] F. Quadrelli et al., "A broadband 22–31-GHz bidirectional image-reject up/down converter module in 28-nm CMOS for 5G communications," in IEEE Journal of Solid-State Circuits, vol. 57, no. 7, pp. 1968-1981, July 2022. [36] T. -C. Tsai et al., "A Ka-band sub-harmonically pumped mixer using diode-connected MOSFET for 5G MM-wave transceivers," 2018 Asia-Pacific Microwave Conference (APMC), 2018, pp. 488-490. [37] Behzad Razavi, RF Microelectronics, Second Edition, Pearson Education, Inc., 2012. [38] J. Kao, Z. Tsai, K. Lin and H. Wang, "A modified Wilkinson power divider with isolation bandwidth improvement," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 9, pp. 2768-2780, Sept. 2012. [39] F. Zhu, K. Wang and K. Wu, "Design considerations for image-rejection enhancement of quadrature mixers," in IEEE Microwave and Wireless Components Letters, vol. 29, no. 3, pp. 216-218, March 2019. [40] H. Okazaki and Y. Yamaguchi, "Wide-band SSB subharmonically pumped mixer MMIC," in IEEE Transactions on Microwave Theory and Techniques, vol. 45, no. 12, pp. 2375-2379, Dec. 1997. [41] K. Hu, K. Ma and Z. Ma, "An ultra-wideband image-reject up-conversion mixer with a sandwich-coupled transformer for 5G mm-wave communication," in IEEE Microwave and Wireless Components Letters, 2022. [42] S. Li, C. Kuo and H. Chiu, "A 24GHz sub-harmonically image rejection mixer with various asymmetrical diode pair," 2010 International Conference on Microwave and Millimeter Wave Technology, 2010, pp. 521-524. [43] H. Wei, C. Meng, J. Su, S. Yu and G. Huang, "17-GHz pHEMT Gilbert single-quadrature downconverter with polyphase filters for image rejection," 2010 Asia-Pacific Microwave Conference, 2010, pp. 690-693. [44] Po-Yu Ke et al., "A fully integrated 24 GHz sub-harmonic image rejection mixer with quadrature coupler," 2008 Asia-Pacific Microwave Conference, 2008, pp. 1-4. [45] Y. Peng et al., "A K-band high-gain and low-noise folded CMOS mixer using current-reuse and cross-coupled techniques," in IEEE Access, vol. 7, pp. 133218-133226, 2019. | - |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/86208 | - |
| dc.description.abstract | 本論文分為三個部分。第一部分(第二章)提出了設計在 24 GHz 的高轉換增益低雜訊的主動降頻混頻器，使用0.18 µm CMOS 製程。此電路利用電流注入技巧以及共振電感的使用，有效地降低雜訊指數以及提升轉換增益。然而，兩次下線的量測結果都不如預期，除錯的過程會在內文中討論，目前尚未找到造成嚴重掉增益的原因。 第二部分(第三章)介紹毫米波鏡像抑制的升降頻模組。利用威爾金森分合波器作為主架構，將左手傳輸線上的電容替換成變容二極體藉以實現可調的相位；將 PIN 型二極體引入 T 型衰減器以實現可調的大小。量測的結果在 2.5 到 5 GHz 可以有 80-100°的相位可調範圍以及 (+2)-(-1.1) dB 的大小可調範圍。整個升降頻模組的鏡像抑制比率在3 到4.5 GHz 有50 dB 的水平，在2.5 和5 GHz 有30 dB 的水平。 最後一部分(第四章)提出了應用於第五代行動通訊系統的高鏡像抑制比率升降頻次諧波混頻器，使用0.15 µm GaAs pHEMT 製程。此電路實現了有很小相位和大小不平衡的 45° LO 分波器，且透過 LO 的級間反射係數的分析，能夠達到高鏡像抑制比率的目的。此外，類集總四分之波長傳輸線的引入，使得端對端的隔離度有很好的表現。藉由第三章的可調式正交分合波器，量測結果在升降頻都有 45 dB 以上的水平。 關鍵字:24 GHz、高增益、低雜訊、電流注入、共振電感、毫米波模組、可調相位、可調大小、第五代行動通訊、高鏡像抑制比率、次諧波升降頻混頻器。 | zh_TW |
| dc.description.abstract | This thesis divided into three parts. In the first part (chapter 2), a 24 GHz high conversion gain and low noise down-conversion active mixer in 0.18 µm CMOS process is presented. The current-bleeding technique and the resonant inductor are adopted to obtain high conversion gain and low noise figure. However, after two tape-outs, the reason for the severe reduction in conversion gain has not been found so far. In the second part (chapter 3), a millimeter-wave up-/down-conversion image rejection module is demonstrated. The capacitors on the left-handed transmission line are replaced with varactors to achieve tunable phase, and the PIN diodes are added to the T-type attenuators to achieve tunable amplitude. The tunable I/Q divider/combiner are based on the Wilkinson power divider. The phase and amplitude tuning at 2.5-5 GHz were measured to be 80-100° and (+2)-(-1.1) dB, respectively. With the great performance of the tunable I/Q divider/combiner, the IRR of the up-/down-conversion image rejection module can reach a 50-dB level at 3-4.5 GHz and a 30-dB level at 2.5 and 5 GHz. In the last part (chapter 4), a 24-32 GHz high image rejection ratio up-/down-conversion subharmonic mixer in 0.15 µm GaAs pHEMT process is proposed. This circuit realizes a 45° LO power divider with small phase and amplitude imbalances. By analyzing the LO inter-stage reflection coefficient, it is able to achieve the desired high image rejection ratio. Besides, good port-to-port isolation is made possible by the implementation of quasi-lumped λLO/4 short/open stubs. With the tunable I/Q divider/combiner in measurement, the IRR in precise phase and amplitude tuning can reach over 45 dB for up-/down-conversion. Index Terms – 24 GHz, high conversion gain (CG), low noise figure (NF), current-bleeding, resonant inductor, millimeter-wave module, tunable phase, tunable amplitude, fifth-generation (5G), high image rejection ratio (IRR), up-/down-conversion subharmonic mixer. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-19T23:42:23Z (GMT). No. of bitstreams: 1 U0001-2309202219225900.pdf: 9857714 bytes, checksum: 0efa89b908436ce339ec198e3b1a9d7d (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | 誌謝 i 中文摘要 iii ABSTRACT iv CONTENTS vi LIST OF FIGURES ix LIST OF TABLES xxiv Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Contributions 2 1.3 Thesis Organization 3 Chapter 2 A 24 GHz High Conversion Gain Down-Conversion Active Mixer Using Noise Cancellation Technique 5 2.1 Introduction 5 2.2 Circuit Design of A 24 GHz High Conversion Gain Down-Conversion Active Mixer Using Noise Cancellation Technique 6 2.2.1 Concepts of The High Conversion Gain and Low Noise Down-Conversion Active Mixer 6 2.2.2 Current Distribution Ratio of The Current-Bleeding Path 9 2.2.3 Size Considerations of The Transistors 11 2.2.4 The Resonant Inductor and RF/LO Transformers 14 2.2.5 The IF Buffer 18 2.2.6 Simulations of The High Conversion Gain and Low Noise Down-Conversion Active Mixer 20 2.3 Experimental Results and Discussions 25 2.4 Summary 36 Chapter 3 Millimeter-Wave Up-/Down-Conversion Image Rejection Module 39 3.1 Introduction 39 3.2 Design Concepts of The Millimeter Wave Up-/Down-Conversion Image Rejection Module 39 3.3 Circuit Design of The Tunable I/Q Divider/Combiner 47 3.3.1 Concepts of The I/Q Divider/Combiner 47 3.3.2 Design of The Wilkinson Power Divider 50 3.3.3 Design of The Tunable Left-/Right-Handed Transmission Lines 54 3.3.4 Design of The Tunable T-Type Attenuator 62 3.3.5 Simulations of The Tunable I/Q Divider/Combiner 70 3.4 Experimental Results 79 3.4.1 Millimeter Wave Up-/Down-Conversion Image Rejection Module 79 3.4.2 Tunable I/Q Divider/Combiner 87 3.4.3 Image Rejection Ratio (IRR) 100 3.5 Summary 109 Chapter 4 A 24-32 GHz High Image Rejection Ratio Up-/Down-Conversion Subharmonic Mixer for 5G Communication 113 4.1 Introduction 113 4.2 Circuit Design of A 24-32 GHz High Image Rejection Ratio Up-/Down-Conversion Subharmonic Mixer for 5G Communication 114 4.2.1 Concepts of The High IRR Up-/Down-Conversion Subharmonic Mixer 114 4.2.2 45° LO Power Divider and In-Phase RF Power Divider/Combiner 122 4.2.3 Subharmonic Mixer Core 134 4.2.4 Simulations of The High IRR Up-/Down-Conversion Subharmonic Mixer 151 4.3 Experimental Results 158 4.4 Summary 175 Chapter 5 Conclusion 180 REFERENCE 182 | - |
| dc.language.iso | zh_TW | - |
| dc.title | 24 GHz 高轉換增益低雜訊混頻器及毫米波高鏡像抑制比率升降頻混頻器與模組之研究 | zh_TW |
| dc.title | Research on 24 GHz High Conversion Gain, Low Noise Mixer and Millimeter-Wave High Image Rejection Ratio Up-/Down-Conversion Mixer and Module | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 110-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 高堃堯;張鴻埜;蔡政翰 | zh_TW |
| dc.contributor.oralexamcommittee | Kun-Yao Kao;Hong-Yeh Chang;Jeng-Han Tsai | en |
| dc.subject.keyword | 24 GHz,高增益,低雜訊,電流注入,共振電感,毫米波模組,可調相位,可調大小,第五代行動通訊,高鏡像抑制比率,次諧波升降頻混頻器, | zh_TW |
| dc.subject.keyword | 24 GHz,high conversion gain (CG),low noise figure (NF),current-bleeding,resonant inductor,millimeter-wave module,tunable phase,tunable amplitude,fifth-generation (5G),high image rejection ratio (IRR),up-/down-conversion subharmonic mixer, | en |
| dc.relation.page | 187 | - |
| dc.identifier.doi | 10.6342/NTU202203942 | - |
| dc.rights.note | 同意授權(全球公開) | - |
| dc.date.accepted | 2022-09-29 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電信工程學研究所 | - |
| dc.date.embargo-lift | 2024-09-30 | - |
| 顯示於系所單位： | 電信工程學研究所 | |
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