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標題: | 神經形態晶片的測試配置和測試樣本自動生成 Automatic Test Configuration and Pattern Generation (ATCPG) for Neuromorphic Chips |
作者: | I-Wei Chiu 邱奕瑋 |
指導教授: | 李建模(Chien-Mo Li) 李建模(Chien-Mo Li | cmli@ntu.edu.tw | ), |
關鍵字: | 神經形態晶片測試,脈衝神經網路,測試樣本生成,測試配置生成,多變量測試, Neuromorphic chip testing,Spiking Neural Network,Test pattern generation,Test configuration generation,Multivariate testing, |
出版年 : | 2022 |
學位: | 碩士 |
摘要: | 近年來對低功耗、高性能神經形態晶片的需求正在快速上升。然而,由於三個原因,常規的測試方法並不適用於神經形態晶片:(1)缺乏可測試性(DfT)的掃描鍊設計,(2)隨機特性,以及(3)可配置功能。在本文中,我們提出了一種測試配置和測試樣本自動生成 (ATCPG) 方法,用於在不使用掃描鍊的情況下測試可配置的隨機性神經形態晶片。首先,我們使用機器學習生成測試配置,最大限度地提高好晶片和壞晶片輸出的差異。然後,我們應用改進的快速梯度符號方法來生成測試樣本。最後,我們利用統計學中的檢定力來決定測試重複。為了判斷晶片是否有錯誤,我們使用霍特林T平方測試來檢定被測晶片的輸出與良好晶片的輸出是否存在顯著差異。我們對其中一種神經形態架構(脈衝神經網路)進行了實驗,以評估我們的 ATCPG 的有效性。實驗結果表明,我們的 ATCPG 在神經元錯誤和突觸錯誤上都可以實現出色的 100% 錯誤覆蓋率,比起傳統功能測試最多提高了 98.70%。此外,我們的實驗結果也表明,當顯著性水平分別為 0.0001 和 0.00001 時,誤宰能夠小於 3% 和 1%。最後但同樣重要的是,我們的 ATCPG 可用於任何神經形態晶片架構,而不僅僅脈衝神經網路。 The demand for low-power, high-performance neuromorphic chips is booming these days. However, conventional testing is not applicable to neuromorphic chips due to three reasons: (1) lack of scan design for testability (DfT), (2) stochastic characteristic, and (3) configurable functionality. In this paper, we present an automatic test configuration and pattern generation (ATCPG) method for testing a configurable stochastic neuromorphic chip without using scan DfT. First, we use machine learning to generate test configurations that maximize the difference between good and bad chip outputs. Then, we apply a modified fast gradient sign method to generate test patterns. Finally, we determine test repetitions with the statistical power of test. To judge whether a chip is faulty or not, we use Hotelling's T-Square test to determine whether there is a significant difference in the outputs of the chip under test and those of the good chip. We conduct experiments on one of the neuromorphic architectures, spiking neural network, to evaluate the effectiveness of our ATCPG. The experimental results show that our ATCPG can achieve an excellent 100% fault coverage on both neuron faults and synapse faults, which is up to 98.70% higher than traditional functional testing. Besides, our simulation results show that the overkill can be less than 3% and 1% when the significance level is 0.0001 and 0.00001, respectively. Last but not least, our ATCPG can be used on any neuromorphic chip architecture, not only spiking neural network. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/84789 |
DOI: | 10.6342/NTU202202606 |
全文授權: | 同意授權(限校園內公開) |
電子全文公開日期: | 2022-09-13 |
顯示於系所單位: | 電子工程學研究所 |
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