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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/83716完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃天偉 | zh_TW |
| dc.contributor.advisor | Tian-Wei Huang | en |
| dc.contributor.author | 鄧健平 | zh_TW |
| dc.contributor.author | Kin Ping Tang | en |
| dc.date.accessioned | 2023-03-19T21:15:16Z | - |
| dc.date.available | 2023-12-26 | - |
| dc.date.copyright | 2022-08-15 | - |
| dc.date.issued | 2022 | - |
| dc.date.submitted | 2002-01-01 | - |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/83716 | - |
| dc.description.abstract | 本論文設計製作四顆微波單晶積體電路(MMICs)，這些電路可以作為5G與未來通信系統的關鍵元件。 應用在D頻段127.5 - 152.5 GHz的次諧波調變器以28-nm CMOS製程製作，在140GHz時，量測顯示該調變器的鏡像抑制比可達到-43dBc，轉換增益則為-9dB。該電路運作在被動模式，不需要消耗任何電能，本論文揭露其中克服次太赫茲高頻電路挑戰的被動元件設計。 Ka頻段25 - 31 GHz功率放大器使用0.15-μm GaAs pHEMT製程實現，量測時該晶片達到43.4% 的最高功率轉換效率以及24.4dBm的飽和輸出功率；同時在27GHz時最高增益是21.2dB。該電路可達到超過36.7% 的寬頻最高功率轉換效率以及超過23.8dBm的寬頻飽和輸出功率。該功率放大器在轉輸64正交振幅調變訊號時，可達到21.5dBm的輸出功率。這個設計之後經過修改，以改善其輸入反射係數以及增加頻寬下的增益平坦度。量測確認其設計上的修改能有效解決上述問題。 另一Ka頻段25 - 31 GHz功率放大器使用0.15-μm GaN-on-SiC HEMT製程及Doherty架構製作，本論文深入探討此如何以補償電晶體在高功率運作下的相位失真以提升效能。該功率放大器達到30.4dBm的飽和輸出功率，同時有25.2%的峰值功率轉換效率；在6dB的功率回推使用時，功率轉換效率仍然保持15%。 | zh_TW |
| dc.description.abstract | This thesis presents the realization of four MMICs as key components of transmitters for 5G and beyond communication systems. A D-band 127.5 – 152.5 GHz subharmonic modulator is fabricated in a 28nm CMOS technology. An image-rejection-ratio of -43dBc is recoded with a -9dB conver-sion gain. The modulator operates passively with no DC power consumption. Design de-tails of the passive components are revealed and discussion is made on overcoming the challenge of the sub-terahertz frequency. A Ka-band 25 – 31 GHz power amplifier is realized in a 0.15-μm GaAs pHEMT process. In measurement it achieves a peak power added efficiency of 43.4% with the saturated output power of 24.4dBm and a peak gain of 21.2dB at 27 GHz. It also demonstrates a wideband performance keeping the peak power added efficiency above 36.7% and saturated output power above 23.8dBm across the bandwidth. Carrying a 64 Quadrature Amplitude Modulation signal, it has an output power of 21.5dBm. The design is then modified to improve its input return loss and flatten the gain across bandwidth. The alteration is proven to be effective by measurement. A Ka-band 25 – 31 GHz Doherty power amplifier is designed with an exper-imental 0.15-μm GaN-on-SiC HEMT process. Details of the architecture are examined with extra effort put to compensate the phase imbalance of the transistors. This work reaches a saturated output power of 30.4dBm with a peak power added efficiency of 25.2%. In a 6dB power back-off, it shows a power added efficiency of 15%. | en |
| dc.description.provenance | Made available in DSpace on 2023-03-19T21:15:16Z (GMT). No. of bitstreams: 1 U0001-0308202215005300.pdf: 9123259 bytes, checksum: ae6216d9810b28097f7cc8d411345e7e (MD5) Previous issue date: 2022 | en |
| dc.description.tableofcontents | 口試委員會審定書 i ACKNOWLEGMENT ii 中文摘要 iii ABSTRACT iv CONTENTS v LIST OF FIGURES ix LIST OF TABLES xvii Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Contribution 2 1.3 Thesis Organizationb 2 Chapter 2 Design of a D-band 127.5 – 152.5 GHz Subharmonic I/Q Modulator with a High Image Rejection Ratio 4 2.1 Background and Motivation 4 2.2 Design of the Subharmonic I/Q Modulator 5 2.2.1 Process Selection 5 2.2.2 Circuit Architecture 5 2.2.3 Device Size and Bias Point Selection 7 2.2.4 IRR and the HPF/LPF structure 13 2.2.5 LO 90 Degree Coupler 17 2.2.6 LO Balun 20 2.2.7 Mixer Core 25 2.2.8 RF Balun 29 2.3 Simulation Result 31 2.3.1 Simulated Performance 31 2.3.2 Process Variation Analysis 35 2.4 Experiment Result and Measurement 38 2.5 Further Investigation 50 2.5.1 Layout Scaling 50 2.5.2 Capacitor Design 50 2.5.3 Device Modeling 52 2.6 Conclusion 53 Chapter 3 Design of a highly efficient 25 – 31 GHz Ka-band 0.15-μm GaAs Power Amplifier with an Output Power of 24.4dBm 54 3.1 Background and Motivation 54 3.2 Process and Device Selection 55 3.3 Circuit Design and Architecture 56 3.3.1 Output Matching Network Design 56 3.3.2 Phase Analysis of the Output Matching Network 57 3.3.3 Bypass Network 60 3.3.4 Input and Inter-Stage Matching 62 3.4 Experimental Result 63 3.4.1 Large Signal Performance 64 3.4.2 Third Order Intermodulation 69 3.4.3 Digital Modulation 71 3.4.4 Measurement Summary and Comparison Table 73 3.5 Conclusion 74 Chapter 4 Redesign of the Ka-band 0.15-μm GaAs Power Amplifier 75 4.1 Background and Motivation 75 4.2 Process and Device Selection 75 4.3 Circuit Design and Architecture 76 4.3.1 Output Matching Network 77 4.3.2 Input Matching 77 4.4 Experimental Result 79 4.4.1 Simulation Result 79 4.4.2 Measurement Result 81 4.5 Conclusion 89 Chapter 5 Design of a Ka-band Doherty Power Amplifier with an Output Power of 30.4dBm in a Novel 0.15-μm GaN-on-SiC Process 91 5.1 Background and Motivation 91 5.2 Process Selection 92 5.3 Architecture and Circuit Design 95 5.3.1 Principle of a Doherty Power Amplifier 95 5.3.2 Basic Architecture 97 5.3.3 Amplifier Design 98 5.3.4 Bypass Network 103 5.3.5 Phase Compensation 103 5.4 Experimental Result 106 5.4.1 Simulation Result 106 5.4.2 Measurement Result 109 5.5 Conclusion 118 Chapter 6 Conclusion 119 References 121 | - |
| dc.language.iso | en | - |
| dc.subject | 次諧波混頻器 | zh_TW |
| dc.subject | 微波單晶積體電路 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | 鏡像抑制 | zh_TW |
| dc.subject | 功率放大器 | zh_TW |
| dc.subject | 次太赫茲 | zh_TW |
| dc.subject | 微波單晶積體電路 | zh_TW |
| dc.subject | 次太赫茲 | zh_TW |
| dc.subject | 次諧波混頻器 | zh_TW |
| dc.subject | 鏡像抑制 | zh_TW |
| dc.subject | MMIC | en |
| dc.subject | sub-terahertz | en |
| dc.subject | subharmonic modulator | en |
| dc.subject | image-rejection-ratio | en |
| dc.subject | power amplifier | en |
| dc.subject | image-rejection-ratio | en |
| dc.subject | subharmonic modulator | en |
| dc.subject | sub-terahertz | en |
| dc.subject | MMIC | en |
| dc.subject | power amplifier | en |
| dc.title | 28nm CMOS D頻段調解器及砷化鎵/氮化鎵Ka頻段功率放大器之設計 | zh_TW |
| dc.title | Design of a 28nm CMOS D-Band Modulator and GaAs/GaN Ka-Band Power Amplifiers | en |
| dc.type | Thesis | - |
| dc.date.schoolyear | 110-2 | - |
| dc.description.degree | 碩士 | - |
| dc.contributor.oralexamcommittee | 李俊興;蔡政翰;鄭宇翔;黃裕津 | zh_TW |
| dc.contributor.oralexamcommittee | Chun-Hsing Li;Jeng-Han Tsai;Yu-Hsiang Cheng;Yuh-Jing Hwang | en |
| dc.subject.keyword | 次太赫茲,次諧波混頻器,鏡像抑制,功率放大器,微波單晶積體電路, | zh_TW |
| dc.subject.keyword | sub-terahertz,subharmonic modulator,image-rejection-ratio,power amplifier,MMIC, | en |
| dc.relation.page | 130 | - |
| dc.identifier.doi | 10.6342/NTU202202012 | - |
| dc.rights.note | 未授權 | - |
| dc.date.accepted | 2022-08-11 | - |
| dc.contributor.author-college | 電機資訊學院 | - |
| dc.contributor.author-dept | 電信工程學研究所 | - |
| 顯示於系所單位： | 電信工程學研究所 | |
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