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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 資訊網路與多媒體研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/82765
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dc.contributor.advisor郭大維(Tei-Wei Kuo)
dc.contributor.authorYin-Chiuan Chenen
dc.contributor.author陳胤銓zh_TW
dc.date.accessioned2022-11-25T07:59:13Z-
dc.date.copyright2021-11-02
dc.date.issued2021
dc.date.submitted2021-09-30
dc.identifier.citationJ. Wang, Y. Yang, T. Wang, R. S. Sherratt, and J. Zhang, “Big data service architecture: a survey,” Journal of Internet Technology, vol. 21, no. 2, pp. 393–405, 2020. W. Shi, J. Cao, Q. Zhang, Y. Li, and L. Xu, “Edge computing: Vision and challenges,” IEEE internet of things journal, vol. 3, no. 5, pp. 637–646, 2016. B. Varghese, N. Wang, S. Barbhuiya, P. Kilpatrick, and D. S. Nikolopoulos, “Challenges and opportunities in edge computing,” in 2016 IEEE International Conference on Smart Cloud (SmartCloud). IEEE, 2016, pp. 20–26. P. J. Denning, “Virtual memory,” ACM Computing Surveys (CSUR), vol. 2, no. 3, pp. 153–189, 1970. H. Akinaga and H. Shima, “Resistive random access memory (reram) based on metal oxides,” Proceedings of the IEEE, vol. 98, no. 12, pp. 2237–2251, 2010. H.-S. P. Wong, S. Raoux, S. Kim, J. Liang, J. P. Reifenberg, B. Rajendran, M. Asheghi, and K. E. Goodson, “Phase change memory,” Proceedings of the IEEE, vol. 98, no. 12, pp. 2201–2227, 2010. T. Mikolajick, C. Dehm, W. Hartner, I. Kasko, M. Kastner, N. Nagel, M. Moert, and C. Mazure, “Feram technology for high density applications,” Microelectronics Reliability, vol. 41, no. 7, pp. 947–950, 2001. S. M. S. Lab. (2017) Technology brief: Ultralow latency with samsung z-nand ssd. [Online]. Available: https://www.samsung.com/semiconductor/global.semi.static/Ultra-Low_Latency_with_Samsung_Z-NAND_SSD-0.pdf I. Corporation. (2018) Produciton brief: Intel optane ssd dc p4800x/p4801x series. [Online]. Available: https://www.intel.com/content/www/us/en/products/docs/memory-storage/solid-state-drives/data-center-ssds/optane-ssd-dc-p4800x-p4801x-brief.html W. Cheong, C. Yoon, S. Woo, K. Han, D. Kim, C. Lee, Y. Choi, S. Kim, D. Kang, G. Yu et al., “A flash memory controller for 15μs ultra-low-latency ssd using high-speed 3d nand flash with 3μs read time,” in 2018 IEEE International Solid-State Circuits Conference-(ISSCC). IEEE, 2018, pp. 338–340. D. Waddington and J. Harris, “Software challenges for the changing storage landscape,” Communications of the ACM, vol. 61, no. 11, pp. 136–145, 2018. J. Yang, D. B. Minturn, and F. Hady, “When poll is better than interrupt.” in FAST, vol. 12, 2012, pp. 3–3. C.-F. Wu, Y.-H. Chang, M.-C. Yang, and T.-W. Kuo, “Joint management of cpu and nvdimm for breaking down the great memory wall,” IEEE Transactions on Computers, vol. 69, no. 5, pp. 722–733, 2020. C. S. Pabla, “Completely fair scheduler,” Linux Journal, vol. 2009, no. 184, p. 4, 2009. Z. Deng, X. Zhu, D. Cheng, M. Zong, and S. Zhang, “Efficient knn classification algorithm for big data,” Neurocomputing, vol. 195, pp. 143–148, 2016. S. Aljawarneh, M. B. Yassein et al., “A resource-efficient encryption algorithm for multimedia big data,” Multimedia Tools and Applications, vol. 76, no. 21, pp. 22 703–22 724, 2017. D. P. Bovet and M. Cesati, Understanding the Linux Kernel: from I/O ports to process management. ” O’Reilly Media, Inc.”, 2005. V. M. Weaver, “Linux perf event features and overhead,” in The 2nd International Workshop on Performance Analysis of Workload Optimized Systems, FastPath, vol. 13, 2013. J. L. Henning, “Spec cpu2006 benchmark descriptions,” ACM SIGARCH Computer Architecture News, vol. 34, no. 4, pp. 1–17, 2006. S. P. E. Corporation. (2018) Spec cpu2017. [Online]. Available: https://www.spec.org/cpu2017/ M. Abadi, P. Barham, J. Chen, Z. Chen, A. Davis, J. Dean, M. Devin, S. Ghemawat, G. Irving, M. Isard et al., “Tensorflow: A system for large-scale machine learning,” in 12th {USENIX} symposium on operating systems design and implementation ({OSDI} 16), 2016, pp. 265–283. A. Kyrola, G. Blelloch, and C. Guestrin, “Graphchi: Large-scale graph computation on just a {PC},” in 10th {USENIX} Symposium on Operating Systems Design and Implementation ({OSDI} 12), 2012, pp. 31–46. N. Nethercote and J. Seward, “Valgrind: a framework for heavyweight dynamic binary instrumentation,” ACM Sigplan notices, vol. 42, no. 6, pp. 89–100, 2007. C. Wong, I. Tan, R. Kumari, J. Lam, and W. Fun, “Fairness and interactive performance of o (1) and cfs linux kernel schedulers,” in 2008 International Symposium on Information Technology, vol. 4. IEEE, 2008, pp. 1–8.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/82765-
dc.description.abstract有著比傳統儲存裝置更低的存取延遲,新興的非揮發性記憶體更能取代傳統硬碟成為適合的儲存裝置。裝備了非揮發性記憶體讓系統能有更好的效能,但在更好的效能之下,系統軟體設計也必須跟著改進,從過去的非同步頁錯誤處理演變為同步處理,然而這種新型的處理機制也帶給了系統一些挑戰。在新的設計下將會減少程式排程器的觸發機會,也會讓程式執行效率受到一些限制。 本篇論文提出了頁錯誤感知的策略,其目標在於讓混合式動態隨機存取記憶體與非揮發性記憶體系統能夠支援巨量記憶體之需求。在提出的設計中,我們調整了程式排程器,以期獲得更適當的程式執行順序,而修改過的執行順序也讓我們能夠把計算和輸出入的執行時間重疊。實驗的結果顯示我們提出的策略能夠有效率的增進整體系統效能,同時也不會犧牲系統的公平性。zh_TW
dc.description.provenanceMade available in DSpace on 2022-11-25T07:59:13Z (GMT). No. of bitstreams: 1
U0001-2609202121472700.pdf: 7744833 bytes, checksum: 605d6efabb399ee42399513267cb9da8 (MD5)
Previous issue date: 2021
en
dc.description.tableofcontents"Abstract i List of Figures iv List of Tables v 1 Introduction 1 2 Background, Observation and Motivation 4 2.1 Background 4 2.1.1 Asynchronous Page Fault Handling 4 2.1.2 Synchronous Page Fault Handling 6 2.2 Observation: Phenomenon of the Synchronous Page Fault Handling 7 2.3 Motivation 10 3 Page-fault-aware strategy 11 3.1 Overview 11 3.2 Page-fault-aware scheduling 11 3.2.1 Adjustment of the Red-Black Tree 11 3.2.2 Working Set Reconstruction 16 3.3 Page-fault-aware prefetching 19 3.3.1 Page grouping policy 19 3.3.2 Dynamic tuning policy 21 4 Evaluation 23 4.1 Experimental Setup 23 4.2 Experimental Results 25 4.2.1 Evaluation on Performance 25 4.2.2 Evaluation on Fairness 27 5 Conclusion 29 Reference 30"
dc.language.isoen
dc.subject非揮發性記憶體zh_TW
dc.subject混合式記憶體zh_TW
dc.subject工作集zh_TW
dc.subject排程器zh_TW
dc.subject巨量記憶體zh_TW
dc.subject極低延遲裝置zh_TW
dc.subjectworking seten
dc.subjectULL deviceen
dc.subjectNVMen
dc.subjecthybrid memoryen
dc.subjectscheduleren
dc.subjecthuge Memoryen
dc.title基於混合式動態隨機存取記憶體與非揮發性記憶體系統之工作執行的效能提升與公平性達成zh_TW
dc.titleHow to Achieve Performance and Fairness in Task Executions over a Hybrid DRAM-NVM Systemen
dc.date.schoolyear109-2
dc.description.degree碩士
dc.contributor.coadvisor張原豪(Yuan-Hao Chang)
dc.contributor.oralexamcommittee施吉昇(Hsin-Tsai Liu),洪士灝(Chih-Yang Tseng),王克中
dc.subject.keyword非揮發性記憶體,巨量記憶體,排程器,極低延遲裝置,混合式記憶體,工作集,zh_TW
dc.subject.keywordNVM,huge Memory,scheduler,ULL device,hybrid memory,working set,en
dc.relation.page32
dc.identifier.doi10.6342/NTU202103372
dc.rights.note未授權
dc.date.accepted2021-09-30
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept資訊網路與多媒體研究所zh_TW
dc.date.embargo-lift2025-10-01-
顯示於系所單位:資訊網路與多媒體研究所

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