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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/81981完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳肇欣(Chao-Hsin Wu) | |
| dc.contributor.author | Ya-Chun Chang | en |
| dc.contributor.author | 張雅淳 | zh_TW |
| dc.date.accessioned | 2022-11-25T05:33:32Z | - |
| dc.date.available | 2026-09-06 | |
| dc.date.copyright | 2021-11-12 | |
| dc.date.issued | 2021 | |
| dc.date.submitted | 2021-09-09 | |
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[11] Posthuma, N.E., et al. Impact of Mg out-diffusion and activation on the p-GaN gate HEMT device performance. in 2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD). 2016. IEEE. [12] Chiu, H.-C., et al., High-performance normally off p-GaN gate HEMT with composite AlN/Al 0.17 Ga 0.83 N/Al 0.3 Ga 0.7 N barrier layers design. IEEE Journal of the Electron Devices Society, 2018. 6: p. 201-206. [13] Green, B.M., et al., The effect of surface passivation on the microwave characteristics of undoped AlGaN/GaN HEMTs. IEEE Electron Device Letters, 2000. 21(6): p. 268-270. [14] Hashizume, T., et al., Surface passivation of GaN and GaN/AlGaN heterostructures by dielectric films and its application to insulated-gate heterostructure transistors. Journal of Vacuum Science Technology B: Microelectronics and Nanometer Structures, 2003. 21(4): p. 1828. [15] Ding, X., Y. Zhou, and J. Cheng, A review of gallium nitride power device and its applications in motor drive. CES Transactions on Electrical Machines and Systems, 2019. 3(1): p. 54-64. [16] Nanjo, T., et al., Improvement of DC and RF Characteristics of AlGaN/GaN High Electron Mobility Transistors by Thermally Annealed Ni/Pt/Au Schottky Gate. Japanese Journal of Applied Physics, 2004. 43(4B): p. 1925-1929. [17] Caesar, M., et al. Generation of traps in AlGaN/GaN HEMTs during RF-and DC-stress test. in 2012 IEEE International Reliability Physics Symposium (IRPS). 2012. IEEE. [18] Yang, S., et al., Fabrication and Characterization of Enhancement-Mode High-$\kappa~{\rm LaLuO}_{3}$-AlGaN/GaN MIS-HEMTs. IEEE Transactions on Electron Devices, 2013. 60(10): p. 3040-3046. [19] Huang, S., et al., Threshold Voltage Instability in Al$_{2}$O$_{3}$/GaN/AlGaN/GaN Metal–Insulator–Semiconductor High-Electron Mobility Transistors. Japanese Journal of Applied Physics, 2011. 50: p. 110202. [20] Zhu, J., et al. Threshold voltage shift and interface/border trapping mechanism in Al<inf>2</inf>O<inf>3</inf>/AlGaN/GaN MOS-HEMTs. in 2018 IEEE International Reliability Physics Symposium (IRPS). 2018. IEEE. [21] Ramanan, N., B. Lee, and V. Misra, Comparison of Methods for Accurate Characterization of Interface Traps in GaN MOS-HFET Devices. IEEE Transactions on Electron Devices, 2015. 62(2): p. 546-553. [22] Mizue, C., et al., Capacitance–Voltage Characteristics of Al2O3/AlGaN/GaN Structures and State Density Distribution at Al2O3/AlGaN Interface. Japanese Journal of Applied Physics, 2011. 50(2): p. 021001. [23] Lu, X., et al., Study of Interface Traps in AlGaN/GaN MISHEMTs Using LPCVD SiN<italic>x</italic>as Gate Dielectric. IEEE Transactions on Electron Devices, 2017. 64(3): p. 824-831. [24] Wang, H.-C., et al., AlGaN/GaN MIS-HEMTs With High Quality ALD-Al2O3 Gate Dielectric Using Water and Remote Oxygen Plasma As Oxidants. IEEE Journal of the Electron Devices Society, 2018. 6(1): p. 110-115. [25] Mahajan, S.S., et al. Electrical characteristics of post-gate-annealed AlGaN/GaN HEMTs on sapphire substrate. in 2014 IEEE 2nd International Conference on Emerging Electronics (ICEE). 2014. IEEE. [26] Hashizume, T., et al., Effects of postmetallization annealing on interface properties of Al2O3/GaN structures. Applied Physics Express, 2018. 11(12). [27] Moens, P., et al. AlGaN/GaN power device technology for high current (100+ A) and high voltage (1.2 kV). in 2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD). 2016. IEEE. [28] Vetury, R., et al., The impact of surface states on the DC and RF characteristics of AlGaN/GaN HFETs. IEEE Transactions on Electron Devices, 2001. 48(3): p. 560-566. [29] Meneghini, M., E. Zanoni, and G. Meneghesso. Gallium nitride based HEMTs for power applications: High field trapping issues. in 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). 2014. IEEE. [30] Saito, W., et al., Field-plate structure dependence of current collapse phenomena in high-voltage GaN-HEMTs. IEEE Electron Device Letters, 2010. 31(7): p. 659-661. [31] Hilt, O., et al. Impact of buffer composition on the dynamic on-state resistance of high-voltage AlGaN/GaN HFETs. in 2012 24th International Symposium on Power Semiconductor Devices and ICs. 2012. IEEE. [32] Po-Chien Chou, et al., Comprehensive dynamic on-resistanceassessments in GaN-on-Si MIS-HEMTs for powerswitching applications. Semiconductor Science and Technology, 2018. 33. [33] Joh, J. and J.A. Del Alamo, A Current-Transient Methodology for Trap Analysis for GaN High Electron Mobility Transistors. IEEE Transactions on Electron Devices, 2011. 58(1): p. 132-140. [34] Mitrofanov, O. and M. Manfra, Poole-Frenkel electron emission from the traps in AlGaN/GaN transistors. Journal of Applied Physics, 2004. 95(11): p. 6414-6419. [35] Kozodoy, P., et al., Heavy doping effects in Mg-doped GaN. Journal of Applied Physics, 2000. 87. [36] Roccaforte, F., et al., Critical issues for interfaces to p-type SiC and GaN in power devices. Applied Surface Science, 2012. 258(21): p. 8324-8333. [37] Kaufmann, U., et al., Hole conductivity and compensation in epitaxial GaN:Mg layers. Physical Review B, 2000. 62(16): p. 10867-10872. [38] Greco, G., F. Iucolano, and F. Roccaforte, Review of technology for normally-off HEMTs with p-GaN gate. Materials Science in Semiconductor Processing, 2018. 78: p. 96-106. [39] Lukens, G., et al., Self-Aligned Process for Selectively Etched p-GaN-Gated AlGaN/GaN-on-Si HFETs. IEEE Transactions on Electron Devices, 2018. 65(9): p. 3732-3738. [40] Chvala, A., et al. Electrothermal analysis of power multifinger HEMTs supported by advanced 3-D device simulation. in 2017 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). 2017. IEEE. [41] Arulkumaran, S., et al., Surface passivation effects on AlGaN/GaN high-electron-mobility transistors with SiO 2, Si 3 N 4, and silicon oxynitride. Applied Physics Letters, 2004. 84(4): p. 613-615. [42] Jones, E.A., F.F. Wang, and D. Costinett, Review of commercial GaN power devices and GaN-based converter design challenges. IEEE Journal of Emerging and Selected Topics in Power Electronics, 2016. 4(3): p. 707-719. [43] Karmalkar, S. and U.K. Mishra, Enhancement of breakdown voltage in AlGaN/GaN high electron mobility transistors using a field plate. IEEE Transactions on Electron Devices, 2001. 48(8): p. 1515-1521. [44] Del Alamo, J.A. and E.S. Lee, Stability and Reliability of Lateral GaN Power Field-Effect Transistors. IEEE Transactions on Electron Devices, 2019. 66(11): p. 4578-4590. [45] Saito, W., et al., On-Resistance Modulation of High Voltage GaN HEMT on Sapphire Substrate Under High Applied Voltage. IEEE Electron Device Letters, 2007. 28(8): p. 676-678. [46] Kordoš, P., et al., Influence of gate-leakage current on drain current collapse of unpassivated GaN∕AlGaN∕GaN high electron mobility transistors. Applied Physics Letters, 2005. 86(25): p. 253511. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/81981 | - |
| dc.description.abstract | 在本篇論文中，我們首先採用不同的鈍化層材料以探討介電質品質對於元件直流特性以及遲滯效應之影響，接著製作p-GaN gate增強型功率元件，並利用大面積的跨接式多指結構，來達到大電流的輸出，並探討這種多指元件其幾何結構對於電性的影響。 本論文的第一部分為分別使用氮化矽、二氧化矽、三氧化二鋁作為元件之鈍化層材料，結果顯示使用氮化矽之元件擁有最低的導通電阻及最高之輸出汲極電流，對於trap-induced current collapse也有最佳的抑制效果；使用二氧化矽之元件在閘極逆偏壓下擁有最低之汲極漏流，較適合應用於高壓元件之製程；實驗結果也顯示使用三氧化二鋁之MOS元件，因表面缺陷造成其遲滯現象與臨界電壓位移現象最嚴重。 第二部分實驗結果顯示MOS-HEMT元件經過金屬後退火製程，有助於修復閘極下方的氧化層，使閘極漏流下降了七個數量級。另外，透過直流量測下的遲滯曲線以及動態量測，可以推論經過金屬後退火製程的元件，會減少深層缺陷的密度，但同時也會增加淺層缺陷密度。 第三部分為增強型高功率元件之製作，我們成功使用含氟的電漿氣體完成p型氮化鎵的蝕刻製程，並精準的控制蝕刻深度以及表面平整度，除此之外，透過增加單根閘極寬度以及閘極的指數可以明顯地提高輸出總電流。實驗結果更顯示，以增加閘極指數的方法提升總輸出電流相對更有效率且穩定。在本篇論文最後，透過場板結構的設計以及雙閘極跨橋的結構，可以成功改善元件的電流崩塌效應並同時有效提升較大閘極寬度元件的電流密度。我們也比較具60 mm閘極寬度但不同幾何結構的大電流元件，實驗結果顯示單根閘極寬度1000微米60指的元件擁有最佳的電性表現，其達到總輸出電流6.55 A、電流密度109.174 mA / mm、導通電阻0.64 Ω。 | zh_TW |
| dc.description.provenance | Made available in DSpace on 2022-11-25T05:33:32Z (GMT). No. of bitstreams: 1 U0001-0709202121095700.pdf: 8940775 bytes, checksum: fd1419e3a198767e6005dd035ff8d508 (MD5) Previous issue date: 2021 | en |
| dc.description.tableofcontents | 論文口試委員會審定書 I 誌謝 II 中文摘要 IV ABSTRACT VI CONTENTS VIII LIST OF FIGURES X LIST OF TABLES XVI Chapter 1 緒論 1 1.1 前言 1 1.2 氮化鎵材料特性介紹 5 1.3 增強型氮化鎵HEMT元件發展概況 8 1.4 研究動機與目的 14 1.5 論文架構 16 Chapter 2 調變表面鈍化層披覆之氮化鎵元件製程 17 2.1 前言 17 2.2 元件佈局設計與架構介紹 18 2.3 磊晶結構介紹 18 2.4 實驗製作流程 20 2.5 不同鈍化層披覆元件之特性分析 26 2.5.1 直流特性分析 26 2.5.2 遲滯效應分析 30 2.6 金屬氧化物半導體電容分析 37 2.6.1 電導法之界面狀態量測與計算 38 2.6.2 電容元件製作流程 40 2.6.3 電導法分析 43 2.7 本章總結 45 Chapter 3 金屬氧化物半導體金屬後退火優化實驗 47 3.1 前言 47 3.2 基礎理論 48 3.3 動態特性量測架設 49 3.4 實驗製作流程 51 3.5 元件特性分析 52 3.5.1 直流特性曲線分析 52 3.5.2 遲滯特性曲線分析 54 3.5.3 動態特性曲線分析 57 3.6 本章總結 60 Chapter 4 p型氮化鎵閘極高電子遷移率電晶體之製作與分析 61 4.1 前言 61 4.2 基礎理論 61 4.3 p型氮化鎵磊晶結構介紹 62 4.4 p型氮化鎵磊晶蝕刻測試 63 4.5 光罩佈局與結構設計 69 4.6 實驗製作流程 70 4.7 直流特性分析 75 4.7.1 不同元件幾何尺寸之直流特性分析 75 4.7.2 高功率元件之直流特性分析 83 4.8 本章總結 88 Chapter 5 優化p型氮化鎵閘極高電子遷移率電晶體之製作與分析 89 5.1 前言 89 5.2 高功率元件光罩佈局設計 89 5.3 實驗製作流程 92 5.4 場板異質結構場效電晶體 101 5.4.1 元件佈局設計 101 5.4.2 量測結果與分析 102 5.5 雙閘極跨橋對元件的電性影響 110 5.5.1 元件佈局設計 111 5.5.2 量測結果與分析 111 5.6 p型氮化鎵閘極高功率電晶體直流特性分析 114 5.7 本章總結 126 Chapter 6 結論與未來展望 128 參考文獻 130 個人著作 136 附錄 137 | |
| dc.language.iso | zh-TW | |
| dc.subject | 缺陷分析 | zh_TW |
| dc.subject | p型氮化鎵/氮化鋁鎵/氮化鎵異質接面結構 | zh_TW |
| dc.subject | 高電子遷移率電晶體 | zh_TW |
| dc.subject | 高功率元件 | zh_TW |
| dc.subject | 增強型元件 | zh_TW |
| dc.subject | 多指元件 | zh_TW |
| dc.subject | 金屬後退火製程 | zh_TW |
| dc.subject | trap states analysis | en |
| dc.subject | p-GaN/AlGaN/GaN | en |
| dc.subject | HEMTs | en |
| dc.subject | High power device | en |
| dc.subject | Enhancement-mode | en |
| dc.subject | Multi-finger layout | en |
| dc.subject | Post-metallization annealing | en |
| dc.title | 高功率增強型氮化鋁鎵/氮化鎵高電子遷移率電晶體之製作與鈍化層表面缺陷分析 | zh_TW |
| dc.title | Fabrication of High Power E-mode AlGaN/GaN HEMTs and Analysis of the Effects of Surface Passivation on Trap States | en |
| dc.date.schoolyear | 109-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 吳育任(Hsin-Tsai Liu),張子璿(Chih-Yang Tseng),鄒安傑 | |
| dc.subject.keyword | p型氮化鎵/氮化鋁鎵/氮化鎵異質接面結構,高電子遷移率電晶體,高功率元件,增強型元件,多指元件,金屬後退火製程,缺陷分析, | zh_TW |
| dc.subject.keyword | p-GaN/AlGaN/GaN,HEMTs,High power device,Enhancement-mode,Multi-finger layout,Post-metallization annealing,trap states analysis, | en |
| dc.relation.page | 140 | |
| dc.identifier.doi | 10.6342/NTU202103045 | |
| dc.rights.note | 同意授權(限校園內公開) | |
| dc.date.accepted | 2021-09-10 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2026-09-06 | - |
| 顯示於系所單位： | 光電工程學研究所 | |
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|---|---|---|---|
| U0001-0709202121095700.pdf 未授權公開取用 | 8.73 MB | Adobe PDF | 檢視/開啟 |
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