請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/79479完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 黃俊郎(Jiun-Lang Huang) | |
| dc.contributor.author | Ching-Lin Li | en |
| dc.contributor.author | 李菁琳 | zh_TW |
| dc.date.accessioned | 2022-11-23T09:01:31Z | - |
| dc.date.available | 2021-11-04 | |
| dc.date.available | 2022-11-23T09:01:31Z | - |
| dc.date.copyright | 2021-11-04 | |
| dc.date.issued | 2021 | |
| dc.date.submitted | 2021-10-13 | |
| dc.identifier.citation | M. J. Kannwischer, J. Rijneveld, P. Schwabe, and K. Stoffelen, “Pqm4: Testing and benchmarking NIST PQC on ARM CortexM4,” IACR Cryptol. ePrint Arch., vol. 2019, p. 844, 2019. M. J. Kannwischer, J. Rijneveld, and P. Schwabe, “Faster multiplication in Z2m [x] on CortexM4 to speed up NIST PQC candidates,” in ACNS, 2019. E. Alkim, D. Y.L. Cheng, C.M. M. Chung, H. Evkan, L. W.L. Huang, V. Hwang, C.L. T. Li, R. Niederhagen, C.J. Shih, J. Wälde, and B.Y. Yang, “Polynomial multiplication in NTRU Prime: Comparison of optimization strategies on CortexM4,” IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2021, no. 1, pp. 217–238, Dec. 2020. DOI: 10.46586/tches.v2021.i1.217-238. [Online]. Available: https://tches.iacr.org/index.php/TCHES/article/view/ 8733. D. Bernstein, C. Chuengsatiansup, T. Lange, and C. V. Vredendaal, “NTRU Prime: Reducing attack surface at low cost,” in SAC, 2017. D. J. Bernstein and B.Y. Yang, “Fast constanttime gcd computation and modular in version,” IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2019, no. 3, pp. 340–398, May 2019. DOI: 10.13154/tches.v2019.i3.340-398. [Online]. Available: https://tches.iacr.org/index.php/TCHES/article/view/ 8298. J. Hoffstein, J. Pipher, and J. H. Silverman, “NTRU: A new high speed public key cryptosystem,” draft from at CRYPTO ‘96 rump session, 1996, [Online]. Available: https://ntru.org/f/hps96.pdf. C. Chen, O. Danba, and J. Hoffstein. (Mar. 30, 2019). “NTRU algorithm specifications and supporting documentation,” [Online]. Available: https://ntru.org/f/ntru-20190330.pdf. D. J. Bernstein, B. B. Brumley, M.S. Chen, C. Chuengsatiansup, T. Lange, A. Marotzke, B.Y. Peng, N. Tuveri, C. van Vredendaal, and B.Y. Yang. (Oct. 7, 2020). “NTRU Prime: Round 3,” [Online]. Available: https://ntruprime.cr.yp.to/nist/ ntruprime-20201007.pdf. Y.L. Cheng, “Number theoretic transform for polynomial multiplication in lattice based cryptography on ARM processors,” 2021. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/79479 | - |
| dc.description.abstract | 美國國家標準暨技術研究院於近年舉辦後量子密碼學標準化競賽以抵禦未來量子電腦帶來的資安問題。NTRU 及 Streamlined NTRU Prime 各別為進入最終階段的入選者及候補者。本篇論文將針對其在 ARM Cortex-M4 平台上金鑰生成的效能進行優化,影響其效能之關鍵瓶頸為多項式模反元素的計算。 本實作使用一個歐幾里德算法的流線型恆定時間變體來優化金鑰生成的速度,NTRU的每組參數皆比當前最佳的實作快96%至97%,而Streamlined NTRU Prime的參數中,除了 sntrup761 之外,皆快了約93%。 | zh_TW |
| dc.description.provenance | Made available in DSpace on 2022-11-23T09:01:31Z (GMT). No. of bitstreams: 1 U0001-0810202123104700.pdf: 1252231 bytes, checksum: 23d6261c9d05889e70dd13b62561808b (MD5) Previous issue date: 2021 | en |
| dc.description.tableofcontents | Chapter 1 Introduction 1 1.1 Motivation 2 1.2 Contribution 2 Chapter 2 Background 3 2.1 NTRU 3 2.2 Streamlined NTRU Prime 4 2.3 Constant-Time Polynomial Modular Inversion 5 Chapter 3 Implementation 10 3.1 Jumpdivsteps Algorithm in (Z/2)[x]/P 11 3.2 Jumpdivsteps Algorithm in (Z/3)[x]/P 20 3.3 Jumpdivsteps Algorithm in (Z/q)[x]/P 26 Chapter 4 Results 35 4.1 NTRU 35 4.2 Streamlined NTRU Prime 35 Chapter 5 Conclusion and Future Works 37 References 39 | |
| dc.language.iso | en | |
| dc.title | 在ARM上實作晶格密碼系統中之多項式模反元素計算 | zh_TW |
| dc.title | Implementation of Polynomial Modular Inversion in Lattice-based cryptography on ARM | en |
| dc.date.schoolyear | 109-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 蕭旭君(Hsin-Tsai Liu),鄭振牟(Chih-Yang Tseng),楊柏因 | |
| dc.subject.keyword | 後量子密碼學,晶格密碼系統,NTRU,NTRU Prime,多項式模反元素,輾轉相除法,ARM Cortex-M4 實作, | zh_TW |
| dc.subject.keyword | Post-quantum cryptography,Lattice-based cryptography,NTRU,NTRU Prime,polynomial reciprocal,Euclid's algorithm,ARM Cortex-M4 implementation, | en |
| dc.relation.page | 40 | |
| dc.identifier.doi | 10.6342/NTU202103629 | |
| dc.rights.note | 同意授權(全球公開) | |
| dc.date.accepted | 2021-10-15 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位: | 電機工程學系 | |
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| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| U0001-0810202123104700.pdf | 1.22 MB | Adobe PDF | 檢視/開啟 |
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