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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/78495完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳志毅(Chih-I Wu) | |
| dc.contributor.author | Ang-Sheng Chou | en |
| dc.contributor.author | 周昂昇 | zh_TW |
| dc.date.accessioned | 2021-07-11T15:00:10Z | - |
| dc.date.available | 2026-01-21 | |
| dc.date.copyright | 2021-03-05 | |
| dc.date.issued | 2021 | |
| dc.date.submitted | 2021-01-22 | |
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| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/78495 | - |
| dc.description.abstract | 要實現二維材料在半導體元件領域中的應用，必須證明元件的性能和製程的可行性。然而，由於費米能級釘扎效應，金屬與半導體介面處的位能障從根本上導致了高接觸電阻和不良的電流傳輸能力，限制了二維材料半導體的發展。在本文中，我們提出並驗證了半金屬電極結合二維半導體材料的概念，其有效抑制了費米能級釘扎效應，從而獲得高效能、低功耗的邏輯電晶體。 首先，在二維材料的製備技術上，我們開發出低溫電漿輔助化學氣相沉積法，成功提升石墨烯品質；接著，通過基板修飾和分子摻雜改善了石墨烯的導電特性，利用傳輸線模型來萃取已摻雜之石墨烯與金屬之接觸電阻，我們獲得最好的結果顯示N型摻雜以鈦作為電極其接觸電阻為0.26 kΩ·μm；P型摻雜以金作為電極其接觸電阻則為0.06 kΩ·μm；最後，在定性分析中，與純金屬電極相比，石墨烯作為與二硫化鉬的半金屬電極表現出最佳結果。 因此，我們擴展了對更多種類半金屬的研究，包括錫、鉍、銻等半金屬。本研究透過氦離子束微影技術，將元件通道微縮至35奈米，所有的二維材料場效電晶體均表現出卓越的短通道性能，也透過拉曼光譜分析、Y函數法與變溫電性量測等實驗加以驗證其顯著的提升機制來自於半金屬與二維材料間的載子交互作用，尤其是鉍電極，其強摻雜效應使「鉍-二硫化鉬」介面處的蕭特基能障高度接近於零，最終達到導通狀態電流密度為860 μA/μm，接觸電阻為0.38 kΩ∙μm，創下二維材料半導體元件領域中的世界紀錄，且已相當接近International Roadmap for Devices and Systems (IRDS) 指標中的矽基邏輯電晶體規格。這些成就為進一步微縮元件尺度和延續摩爾定律提供了一條切實可行的途徑。 | zh_TW |
| dc.description.abstract | A wide variety of two-dimensional (2D) materials covers broad electronic properties, including metals, semimetals, semiconductors, and insulators. In order to realize the future 2D semiconductor electronics, it is imperative to prove the process feasibility and device performance. Many of those 2D materials have demonstrated promising potential for electronic and optoelectronic applications. In this thesis, we focused on forming a low resistance metal-2D contact for high performance low power logic application. We proposed to adopt several specific semimetals as metal contact to 2D semiconductor materials, where the Fermi-level pinning effect could be relieved, thereby lowering the contact resistance (RC) to below 0.5 kΩ∙μm in 2D devices. In the second chapter, we at first developed a low-temperature plasma-enhanced chemical vapor deposition (CVD) process to successfully improve the film quality of graphene. The electrical properties of the fresh graphene could be further enhanced through substrate modification and molecular doping. Then we used graphene as the semimetal contact to molybdenum disulfide (MoS2) and demonstrated a higher current performance 5 times than pure metal contacts through the qualitative electrical analysis. In the following chapters, we expanded the research to other kinds of semimetals, including Tin (Sn), Bismuth (Bi), Antimony (Sb). All of them demonstrated superior short channel monolayer MoS2 field-effect-transistor (FET) performance that the Bi contact reached near zero Schottky barrier height, a low RC value of 0.38 kΩ∙μm, and a record high ON-state current density of 860 μA/μm at VDS = 1 V. Above device performance could be further boost through material and process optimization, allowing to satisfy the specification of Si logic transistors in the metrics of International Roadmap for Devices and Systems (IRDS). The achievement in this work also provides a practical pathway to enable further shrinkage of device scale and extend Moore’s law. | en |
| dc.description.provenance | Made available in DSpace on 2021-07-11T15:00:10Z (GMT). No. of bitstreams: 1 U0001-2101202121231400.pdf: 12649336 bytes, checksum: 1f3a446a127659275b769b9113261b61 (MD5) Previous issue date: 2021 | en |
| dc.description.tableofcontents | 摘要 I Abstract II Contents IV Table List VIII Figure List IX Chapter 1. Introduction 1 1-1. Fundamentals of two-dimensional materials 2 1-1-1. Semimetal ─ Graphene 2 1-1-2. Semiconductor ─ Transition metal dichalcogenides (TMDCs) 5 1-2. Developments of two-dimensional materials 7 1-3. Motivation (advantages and bottlenecks) 14 Chapter 2. Experiments Methodologies 17 2-1. Growth mechanism of chemical vapor deposition 17 2-1-1. Thermal-assisted 17 2-1-2. Plasma-enhanced 19 2-2. Analysis of materials qualities 25 2-2-1. Transfer process 25 2-2-2. Raman spectroscopy and photoluminescence spectroscopy 26 2-2-3. Atomic force microscope 28 2-2-4. Transmission electron microscopy 29 2-2-5. Photoemission spectroscopy 31 2-3. Devices fabrication and Lithography system 35 2-3-1. LED mask-less aligner 35 2-3-2. Principle of scanning microscope (HIM) 36 2-3-3. Helium ion beam lithography 39 2-4. Physical Vapor Deposition System 40 2-5. Vacuum Measurement System 42 2-6. Extraction of electrical properties 43 2-6-1. Mobility 43 2-6-2. Contact resistance 47 2-6-3. Schottky barrier (temperature-dependent measurement) 50 Chapter 3. Graphene based transistors 55 3-1. Growth and detection 55 3-1-1. High quality film growth 55 3-1-2. Polymer-free transfer 58 3-1-3. Quality detection 59 3-2. Graphene doping 63 3-2-1. Transistors fabrication 64 3-2-2. Substrate modify 66 3-2-3. Additional doping 67 3-3. Electrical and optical properties 67 3-3-1. Electrical characteristic 67 3-3-2. Interfaces analysis: Photoelectron spectroscopy 74 3-4. Contact optimization in 2D logic application 78 Chapter 4. CVD-1L-MoS2 with Tin (Sn) contacts 81 4-1. Qualities analysis and device fabrication 81 4-2. Electrical properties of common metal (Ni) v.s Sn 86 4-2-1. Transfer and output characteristic 86 4-2-2. Sn/MoS2 interface (re-melting model) 88 4-3. Temperature-dependent measurement 90 4-3-1. Schottky barrier 90 4-3-2. Contact resistance 91 4-4. Benchmark 92 4-4-1. Carrier density and contact resistance 92 4-4-2. On-state current and channel length scaling 94 Chapter 5. CVD-1L-MoS2 with Bismuth (Bi) contacts 96 5-1. Metal contacts doping effect 96 5-2. Electrical properties of Bi v.s Sn 97 5-2-1. Transfer and output characteristic 97 5-2-2. Detail discussion about Bi/MoS2 interface 98 5-3. Benchmark 101 5-3-1. Record high On-state current 101 5-3-2. Record low contact resistance without intentional doping 102 5-4. Tungsten disulfide (WS2) with Bi contacts 104 5-5. Thermal reliability 107 5-6. Antimony (Sb) contacts 108 Chapter 6. Conclusions and future work 110 Reference 113 Publication list 124 | |
| dc.language.iso | en | |
| dc.subject | 邏輯電晶體 | zh_TW |
| dc.subject | 半金屬 | zh_TW |
| dc.subject | 二維材料 | zh_TW |
| dc.subject | 接觸電阻 | zh_TW |
| dc.subject | Semimetal | en |
| dc.subject | Contact resistance | en |
| dc.subject | Logic transistor | en |
| dc.subject | Two-dimensional material | en |
| dc.title | 半金屬電極於二維材料邏輯電晶體之電特性研究 | zh_TW |
| dc.title | Investigation of Electrical Properties of Two-dimensional Material Logic Transistors with Semimetal Electrodes | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 109-1 | |
| dc.description.degree | 博士 | |
| dc.contributor.oralexamcommittee | 張文豪(Wen-Hao Chang),吳育任(Yuh-Renn Wu),簡昭欣(Chao-Hsin Chien),陳美杏(Mei-Hsing Chen) | |
| dc.subject.keyword | 二維材料,邏輯電晶體,接觸電阻,半金屬, | zh_TW |
| dc.subject.keyword | Two-dimensional material,Logic transistor,Contact resistance,Semimetal, | en |
| dc.relation.page | 125 | |
| dc.identifier.doi | 10.6342/NTU202100118 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2021-01-25 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| dc.date.embargo-lift | 2026-01-21 | - |
| 顯示於系所單位： | 光電工程學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| U0001-2101202121231400.pdf 未授權公開取用 | 12.35 MB | Adobe PDF |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。