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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳奕君(I-Chun Cheng) | |
dc.contributor.author | Wen-Liang Huang | en |
dc.contributor.author | 黃文亮 | zh_TW |
dc.date.accessioned | 2021-07-11T14:35:59Z | - |
dc.date.available | 2021-09-04 | |
dc.date.copyright | 2017-09-04 | |
dc.date.issued | 2017 | |
dc.date.submitted | 2017-08-18 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/77849 | - |
dc.description.abstract | 本研究成功地利用二氧化鋯背覆蓋層氧化效應於低溫下製作出n型錫氧化物薄膜電晶體,製程中最高溫度為225C。研究中先針對製作於玻璃基板上的n型錫氧化物薄膜電晶體進行優化,特別針對濺鍍錫氧化物時的氧氣流量比例、二氧化鋯背覆蓋層的厚度、二氧化鋯背覆蓋層的蒸鍍過程中有無通入氧氣以及後退火的時間進行一系列的探討。接著,對優化之n型錫氧化物薄膜電晶體進行偏壓穩定性測試。最後將此n型錫氧化物薄膜電晶體製作於聚醯亞胺(polyimide film, PI)軟性基板上,並探討其在不同彎曲程度下電性的變化。
當濺鍍錫氧化物時的氧氣流量比例為4.2%、二氧化鋯背覆蓋層的厚度為100 nm且蒸鍍過程中通入氧氣5 sccm並搭配225 C後退火120 min,錫氧化物薄膜電晶體具有最佳的n型電性表現,其載子遷移率達0.5 cm2V-1s-1、臨界電壓為1.4 V、次臨界擺幅為1.7 V/dec、開關電流比為3.9×105。由X光光電子能譜分析(X-ray photoelectron spectroscopy,簡稱XPS)得知,在沉積二氧化鋯背覆蓋層並於225C後退火120 min後,錫氧化物成分由原本Sn2+為主轉變為Sn4+為主,意即大量氧化亞錫轉變為氧化錫,同時伴隨著氧空缺的生成,成為電晶體n型傳導機制的來源。但X光繞射儀(X-ray Diffraction, XRD)的結果顯示錫氧化物薄膜並未出現氧化錫結晶相,可能是由於退火溫度僅為225C,並未達到氧化錫結晶所需的溫度。此外,在n型錫氧化物薄膜電晶體偏壓穩定性測試中發現,無論是經過長時間的正偏壓或是負偏壓,電晶體的電性皆會有明顯的衰退,推測原因是由於二氧化鋯背覆蓋層的缺陷過多,無法具有良好的封裝效果,導致空氣中的水氣或氧氣滲入了錫氧化物的背通道層進而影響電晶體電性表現。製作於PI軟性基板上的n型錫氧化物薄膜電晶體則具有0.13 cm2V-1s-1的載子遷移率、0.7 V的臨界電壓、1.7 V/dec的次臨界擺幅以及3.3×105的電流開關比,當其處於 ±0.05 % (曲率半徑為5 cm)、±0.08 % (曲率半徑為3 cm)與 ±0.25 % (曲率半徑為1 cm)的張應變及壓應變下,載子遷移率與電流開關比僅些微下降,次臨界擺幅則有些微上升,臨界電壓則產生約+1 V的偏移量。 | zh_TW |
dc.description.abstract | In this study, we've successfully demonstrated n-channel SnOx thin-film transistors (TFTs) on glass and polyimide substrates via ZrO2 capping layer assisted oxidation effect. The highest process temperature for the TFTs is 225℃. First, we investigated the influence of the process parameters, such as the oxygen/argon flow rate ratio during the sputtering process of tin oxide active layer, the thickness of ZrO2 capping layer, the addition of oxygen during ZrO2 evaporation and the post-annealing time for the n-channel SnOx TFTs. Then the optimal process condition was applied to to fabricate n-channel SnOx TFTs on flexible polyimide (PI) substrates.
The n-channel SnOx TFT is optimized when the tin oxide active layer is sputtered at a 4.2 % oxygen/argon flow rate ratio capped with a 100-nm-thick ZrO2 which is obtained with the addition of 5 sccm oxygen during the evaporation process and then post-anneal at 225℃ for 120 min in amient air. It exhibits a threshold voltage of 1.4 V, field-effect mobility of 0.5 cm2V-1s-1, subthreshold swing of 1.7 V/dec, and on/off current ratio of 3.9×105. The XPS analysis shows that the n-channel behavior can be attributed to the conversion of SnOx active channel from p-type SnO-dominant to n-type SnO2-dominant phases and the increase amount of oxygen vacancies in the channel. We further investigated the electrical bias-stress stability of the n-channel SnOx TFT. The result shows that both the positive and negative bias-stresses can deterimate its electrical stability. It is pausible casued by the permeation of oxygen and/or water vapor through the defects in the ZrO2 capping layer. The flexible n-channel SnOx TFT exhibits a threshold voltage of 0.7 V, field-effect mobility of 0.13 cm2V-1s-1, subthreshold swing of 1.7 V/dec, and on/off current ratio of 3.3×105. In the mechanical bending tests, degradation of the flexible n-channel SnOx TFT has been observed when ±0.05 % (r = 5 cm), ±0.08 % (r = 3 cm) and ±0.25 % (r = 1 cm) mechanical tensile or compressive strain are applied. The influence of mobility, on/off current ratio and subthreshold swing are negligible, and the ∆Vth is about 1 V. | en |
dc.description.provenance | Made available in DSpace on 2021-07-11T14:35:59Z (GMT). No. of bitstreams: 1 ntu-106-R04941075-1.pdf: 5569044 bytes, checksum: ff1bc93c9b2bae36903d34dfdd02e8d2 (MD5) Previous issue date: 2017 | en |
dc.description.tableofcontents | 致謝 i
中文摘要 ii ABSTRACT iv 目錄 vi 圖目錄 ix 表目錄 xv 第一章 緒論 1 1.1 軟性電子元件發展概況 1 1.2 薄膜電晶體發展背景 1 1.3 研究動機 3 1.4 論文架構 4 第二章 理論與文獻回顧 5 2.1 薄膜電晶體簡介 5 2.1.1 薄膜電晶體之元件結構 5 2.1.2 薄膜電晶體之工作原理 6 2.1.3 薄膜電晶體之特徵參數 7 2.1.4 薄膜電晶體之穩定性 10 2.2 氧化錫之材料特性 12 2.2.1 氧化錫的結構和基本特性 12 2.2.2 氧化錫的N型導電特性 12 2.2.3 錫-氧系統相圖 14 2.3 氧化錫之應用 15 2.3.1 N型錫氧化物薄膜電晶體文獻回顧 15 2.3.2 錫氧化物互補式反相器文獻回顧 28 第三章 研究方法 32 3.1 薄膜沉積系統與原理 32 3.1.1 電漿輔助化學氣相沉積系統 (Plasma Enhanced Chemical Vapor Deposition, PECVD) 32 3.1.2 原子層沉積系統 (Atomic Layer Deposition, ALD) 33 3.1.3 電子束蒸鍍系統 (E-Beam Evapotator) 34 3.1.4 射頻磁控濺鍍系統 (Radio-Frequency Magnetron Sputter) 35 3.2 微影製程與原理 36 3.3 蝕刻製程與原理 38 3.3.1 濕式蝕刻 (Wet Etching) 38 3.3.2 感應耦合電漿離子蝕刻系統 (Inductively Coupled Plasma Reactive Ion Etch, ICP-RIE) 38 3.4 N型錫氧化物薄膜電晶體製程 40 3.5 量測分析方法 45 3.5.1 低掠角X光繞射儀 (Grazing Incident X-ray Diffraction, GIXRD) 45 3.5.2 X光光電子能譜學(X-ray photoelectron spectroscopy,簡稱XPS) 46 3.5.3 薄膜電晶體特性量測方法 47 3.5.4 薄膜電晶體偏壓穩定性測試方法 47 3.5.5 彎曲測試量測方法 48 第四章 實驗結果與討論 50 4.1 錫氧化物薄膜特性分析 50 4.1.1 成分分析 50 4.1.2 結晶相分析 53 4.2 錫氧化物薄膜電晶體元件特性分析 54 4.2.1 二氧化鋯背覆蓋層的存在對N型錫氧化物薄膜電晶體電性影響 54 4.2.2 二氧化鋯背覆蓋層的蒸鍍過程中有無通氧對N型錫氧化物薄膜電晶體電性影響 58 4.2.3 濺鍍錫氧化物時的氧氣流量比例對N型錫氧化物薄膜電晶體電性影響 61 4.2.4 二氧化鋯背覆蓋層厚度對N型錫氧化物薄膜電晶體特性影響 68 4.2.5 最佳製程條件之N型錫氧化物薄膜電晶體 75 4.3 N型錫氧化物薄膜電晶體元件偏壓穩定性測試 77 4.4 可撓性錫氧化物薄膜電晶體元件特性分析 79 4.5 可撓性N型錫氧化物薄膜電晶體彎曲下之元件特性分析 82 第五章 結論與未來展望 84 5.1 結論 84 5.2 未來展望 86 附錄 87 Ⅰ 二氧化鋯背覆蓋層成分分析 77 Ⅱ 最佳製程條件下不同尺寸之錫氧化物薄膜電晶體 79 Ⅲ 最佳製程條件下不同尺寸之可撓性錫氧化物薄膜電晶體 95 參考文獻 101 | |
dc.language.iso | zh-TW | |
dc.title | 以二氧化鋯背覆蓋層氧化效應製備可撓性N型錫氧化物薄膜電晶體之研究 | zh_TW |
dc.title | Flexible N-Type SnOx Thin-Film Transistors Fabricated via ZrO2 Capping Layer Assisted Oxidation Effect | en |
dc.type | Thesis | |
dc.date.schoolyear | 105-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 吳志毅(Chi-Hi Wu),吳肇欣(Chao-Hsin Wu),陳建彰(Jiang-Zhang Chen) | |
dc.subject.keyword | 可撓性電子元件,n型氧化物半導體,薄膜電晶體,氧化錫,二氧化鋯,彎曲測試,偏壓穩定性, | zh_TW |
dc.subject.keyword | flexible electronics,n-type oxide-based semiconductor,thin-film transistor (TFT),stannic oxide (SnO2),zicornium oxide (ZrO2),bending test,gate-bias stress stability, | en |
dc.relation.page | 106 | |
dc.identifier.doi | 10.6342/NTU201704015 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2017-08-19 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
顯示於系所單位: | 光電工程學研究所 |
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