顯著鐵電特性在次10奈米二氧化鋯鉿薄膜與鍺金氧半元件介面工程之研究

Abstract

More than Moore和Beyond Moore這兩個概念將是未來發展半導體的重要趨勢，本論文以此作為動機。在More than Moore方面，嵌入式非揮發記憶體扮演著十分重要的角色，本論文前半部分探討如何開發穩定的新式鐵電非揮發記憶體，透過基材的選用與應力的調變，解決傳統上二氧化鋯鉿(Hf0.5Zr0.5O2, HZO)鐵電薄膜遇到的高熱預算問題，成功在300°C的製程溫度下製作出高品質鐵電薄膜，也開發出超大殘餘極化量(remnant polarization, 2Pr~51.2 μC/cm2)的次10 nm HZO鐵電薄膜，並在超薄厚度下(3 nm)誘發出良好的鐵電特性。此外，針對Beyond Moore的概念，本論文的後半段使用較高遷移率的鍺來取代矽做為場效電晶體的通道材料，研究透過無氧的氮化鋁(AlN)鈍化層來解決介面氧化鍺熱穩定性不佳的問題，藉由抑制介面氧化鍺(GeOx)可以有效降低等效電容厚度(equivalent oxide thickness, EOT)與漏電流(Jg)，介面的缺陷密度也得以獲得改善。本論文進一步開發原子層轟擊(atomic layer bombardment, ALB)技術來製備AlN鈍化層，以提升鍺金氧半電容元件的特性，成功實現低EOT (~1.19 nm)與低Jg (~1.16×10-4 A/cm2)的高效能金氧半電容元件，並將此高品質AlN鈍化層整合至鍺基的鰭式場效電晶體(Ge FinFET)，擁有大於四個數量級的開關電流、低次臨界斜率(sub-threshold swing, SS~121 mV/dec)以及抑制短通道效應的效果。

“More than Moore” and “beyond Moore” are the important trend of development of advanced semiconductor technology in the future. In “More than Moore”, embedded non-volatile memory plays an important role. In the first half of this thesis, well-behaved ferroelectric non-volatile memory devices were investigated. Based on the selection of the bottom electrode and the modulation of film stress, the critical issue of high annealing temperatures for ferroelectric phase formation in hafnium zirconium oxide (Hf0.5Zr0.5O2, HZO) was solved. Pronounced ferroelectric sub-10 nm HZO thin films were accomplished with a low process temperature of only 300°C and a record high remnant polarization (2Pr~51.2 μC/cm2), and significant ferroelectricity and a low coercive field were also achieved in the 3nm HZO thin film. For the “Beyond Moore”, germanium was used as the channel material in this study. Owing to the poor thermal stability of interfacial GeOx, the non-oxygen aluminum nitride (AlN) passivation layer was proposed in the second part of this thesis. High-quality interface engineering with the suppression of interfacial GeOx by the AlN passivation layer is an effective approach to produce a significant enhancement in electrical properties of the high-K gate dielectrics on Ge, including equivalent oxide thickness (EOT), gate leakage current (Jg) and interface traps. In addition, the atomic layer bombardment (ALB) technique was introduced to further improve the performance of the AlN passivation layer in germanium devices. A low EOT (~1.19 nm), Jg (~1.16×10-4 A/cm2) and high reliability were achieved in germanium metal-oxide-semiconductor capacitors. Moreover, the electrical characteristics with >104 on/off ratio, a low sub-threshold swing ~121 mV/dec and suppression of short channel effects were also achieved by the high-quality AlN passivation layer in Ge-based FinFETs.