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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電機工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/7584
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor陳景然(Ching-Jan Chen)
dc.contributor.authorJheng-An Juan Luen
dc.contributor.author阮呂政安zh_TW
dc.date.accessioned2021-05-19T17:47:07Z-
dc.date.available2023-06-05
dc.date.available2021-05-19T17:47:07Z-
dc.date.copyright2020-06-05
dc.date.issued2020
dc.date.submitted2020-06-03
dc.identifier.citation[1] Jinwen Xiao, A. Peterchev, Jianhui Zhang and S. Sanders, 'A 4/spl mu/A-quiescent-current dual-mode buck converter IC for cellular phone applications,' in 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519), San Francisco, CA, 2004, pp. 280-528 Vol.1.
[2] P. Chen, C. Wu and K. Lin, 'A 50 nW-to-10 mW output power tri-mode digital buck converter with self-tracking zero current detection for photovoltaic energy harvesting,' in IEEE Journal of Solid-State Circuits, vol. 51, no. 2, pp. 523-532, Feb. 2016.
[3] C. Song, “Accuracy analysis of constant-on time current-mode dc-dc converters for powering microprocessors,” in Proc. IEEE APEC, 2009, pp. 97-101.
[4] R. Redl and J. Sun, “Ripple-based control of switching regulators – an overview,” in IEEE Trans. Power Electron., vol.24, no. 12, pp. 2669-2280, Dec. 2009.
[5] J. Sun, “Characterization and performance comparison of ripple-based control for voltage regulators modules,” in IEEE Trans. Power Electron., vol.21, no. 2, pp. 346-353, Mar. 2006.
[6] J. Li and F. C. Lee, “Modeling of V2 current-mode control,” in Proc. IEEE APEC, 2009, pp. 298-304.
[7] S. Qu, “Modeling and design considerations of V2 controlled buck regulator,” in Proc. IEEE APEC, 2001, pp. 507-513.
[8] Y. Yan, P. Liu, F. Lee, Q. Li and S. Tian, 'V2 control with capacitor current ramp compensation using lossless capacitor current sensing,' in 2013 IEEE Energy Conversion Congress and Exposition, Denver, CO, 2013, pp. 117-124.
[9] Jian Li, “Current-mode control: modeling and its digital application,” Ph.D Dissertation of Virginia Polytechnic Institute and State University, Commonwealth of Virginia, Apr. 2009.
[10] S. Pan, C. Chen and C. Tsai, 'A novel capacitor current constant on-time controlled buck converter at 4-MHz switching frequency,' in 2018 IEEE Energy Conversion Congress and Exposition (ECCE), Portland, OR, 2018, pp. 6008-6013.
[11] W. Chen, C. Lin and K. Chen, 'Differential zero compensator in delay-ripple reshaped constant on-time control for buck converter with multi-layer ceramic capacitors,' in 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, 2012, pp. 692-695.
[12] B. Wicht, T. Nirschl and D. Schmitt-Landsiedel, 'Yield and speed optimization of a latch-type voltage sense amplifier,' in IEEE Journal of Solid-State Circuits, vol. 39, no. 7, pp. 1148-1158, July 2004.
[13] Yogesh Kumar Ramadass, “Energy processing circuits for low-power application,” Ph.D Dissertation of Massachusetts Institute of Technology, Jun. 2009.
[14] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design 2nd Edition. Oxford University 2002.
[15] D. Johns and K. Martin, Analog Integrated Circuit Design. New York: Wiley, 2000.
[16] C. Manoj Kumar, S. Bharath, K. Anusha and C. Ajay Kumar, “Design of a double tail dynamic comparator for low power and high speed applications,” in International Journal of Scientific & Engineering Research, Vol. 7, Issue 3, March-2016
[17] S. Aakash, A. Anisha, G. J. Das, T. Abhiram and J. P. Anita, 'Design of a low power, high speed double tail comparator,' in 2017 International Conference on Circuit, Power and Computing Technologies (ICCPCT), Kollam, 2017, pp. 1-5.
[18] S. Babayan-Mashhadi and R. Lotfi, 'Analysis and design of a low-voltage low-power double-tail comparator,' in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 2, pp. 343-352, Feb. 2014.
[19] S. Bandyopadhyay, Y. K. Ramadass and A. P. Chandrakasan, '20μA to 100mA DC-DC converter with 2.8 to 4.2V battery supply for portable applications in 45nm CMOS,' in 2011 IEEE International Solid-State Circuits Conference, San Francisco, CA, 2011, pp. 386-388.
[20] Santoro, Francesco, Rüdiger Kuhn, Neil Gibson, Nicola Rasera, Thomas Tost, Helmut E. Graeb, Bernhard Wicht and Ralf Brederlow. “A hysteretic buck converter with 92.1% maximum efficiency designed for ultra-low power and fast wake-up SoC applications.” in IEEE Journal of Solid-State Circuits 53 (2018): 1856-1868.
[21] S. Tian, F. C. Lee, P. Mattavelli, K. Cheng and Y. Yan, 'Small-Signal Analysis and Optimal Design of External Ramp for Constant On-Time V $^{ f 2}$ Control With Multilayer Ceramic Caps,' in IEEE Transactions on Power Electronics, vol. 29, no. 8, pp. 4450-4460, Aug. 2014.
[22] Y. Lin, C. Chen, D. Chen and B. Wang, 'A ripple-based constant on-time control with virtual inductor current and offset cancellation for DC power converters,' in IEEE Transactions on Power Electronics, vol. 27, no. 10, pp. 4301-4310, Oct. 2012.
[23] S. C. Huerta, A. Soto, P. Alou, J. A. Oliver, O. García and J. A. Cobos, 'Advanced control for very fast DC-DC converters based on hysteresis of the cout current,' in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 4, pp. 1052-1061, April 2013.
[24] S. C. Huerta, P. Alou, J. A. Oliver, O. Garcia, J. A. Cobos and A. Abou-Alfotouh, 'A very fast control based on hysteresis of the Cout current with a frequency loop to operate at constant frequency,' in 2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition, Washington, DC, 2009, pp. 799-805.
[25] S. Huang, K. Fang, Y. Huang, S. Chien and T. Kuo, '12.6 Capacitor-current-sensor calibration technique and application in a 4-phase buck converter with load-transient optimization,' in 2016 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 2016, pp. 228-229.
[26] Y. Li, C. Chen and C. Tsai, 'A constant on-time buck converter with analog time-optimized on-time control,' in IEEE Transactions on Power Electronics, vol. 35, no. 4, pp. 3754-3765, April 2020.
[27] S. Pan, “A novel capacitor current constant on-time controlled buck converter with a dynamic on-time generator,” Master Dissertation of National Taiwan University, Dec. 2018.
[28] W. Yang et al., 'A constant on-time control DC–DC buck converter with the pseudowave tracking technique for regulation accuracy and load transient enhancement,' in IEEE Transactions on Power Electronics, vol. 33, no. 7, pp. 6187-6198, July 2018, doi: 10.1109/TPEL.2017.2746659.
[29] Ching-Jan Chen, 'Power Electronics and Integrated Circuit Control: Switch Realization and Efficiency,' Course Slide of National Taiwan University, Spring, 2018.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/7584-
dc.description.abstract市面上越來越多的低功率降壓轉換器被應用於手持式裝置以及物聯網裝置,像是手機、電子智慧手環、心律血壓偵測器…等。由於這類產品需要能長時間使用並且這些裝置大部分時間都處於待機且低負載的狀態,所以其降壓轉換器需要能應付寬廣的負載範圍變化以及有良好的輕載效率。然而在輕載效率下,降低控制器的功率損耗將會是低功率之降壓轉換器的一大難題。本論文提出一高度數位化之降壓轉換器控制積體電路,其動態負載範圍為1.25x〖10〗^5,且在100μA負載電流下仍有85%以上的效率。控制積體電路主要針對導通時間產生器、補償器以及電容電流感測器電路做改良,導通時間產生器以數位的方式實現,使其可以隨負載下降功耗。補償器則利用電荷幫浦式誤差放大器及動態偏壓電路來降低偏壓電流的消耗。電容電流感測器利用全被動元件感測電流,取代傳統放大器組成的感測器。上述所提出之電路,使用台積電 0.18μm 製程實現,晶片面積為 1.2 平方毫米。第一個版本中實現了連續導通模式並且量測之峰值效率為88.5%。第二個版本中實現了連續導通模式以及不連續導通模式,模擬顯示控制器的總靜態電流為3.3μA,在10μA的負載下,效率為47%。當負載大於100μA,效率皆大於85%。zh_TW
dc.description.abstractThe low-power buck converters are widely used in consumer electronic products and Internet of Things products, such as electronic smart bracelets, heart rate detectors, etc. Since these devices need to be used for a long time and they operate in standby mode most of the time, the low-power buck converter needs to handle the wide load range and have good light load efficiency. However, under light load efficiency, reducing the power loss of the controller will be a major problem for low-power buck converters. This thesis proposed a highly digital controller buck converter with a dynamic load range of 1.25 x 〖10〗^5, and an efficiency of more than 85% at a load current of 100μA. The controller is mainly aimed at improving the on-time generator, compensator, and capacitive current sensor circuit. The on-time generator was implemented in a digital manner so that it can reduce power consumption with the load. The compensator was replaced by a charge pump-based error amplifier and a dynamic bias circuit to reduce the consumption of bias current. The capacitor-current sensor was implemented by fully passive components, instead of the amplifier-based current sensor. The proposed control was fabricated in an integrated circuit using 0.18 μm TSMC CMOS process with the chip area is 1.2mm^2. In the first version, the CCM part was implemented and the peak efficiency was measured to be 88.5%. In the second edition, CCM and DCM were implemented. The simulation showed that the total quiescent current of the controller consumes 3.3 μA, and the efficiency is 47% under 10 μA load current. When the load current is greater than 100μA, the efficiency is larger than 85%.en
dc.description.provenanceMade available in DSpace on 2021-05-19T17:47:07Z (GMT). No. of bitstreams: 1
ntu-109-R06921070-1.pdf: 5528197 bytes, checksum: c5915fe811270783237f6977ad32368f (MD5)
Previous issue date: 2020
en
dc.description.tableofcontents口試委員審定書 i
致謝 ii
摘要 iii
Abstract iv
Contents vi
List of Figures ix
List of Tables xiii
Chapter 1 Introduction 1
1.1 Background: Voltage Regulators (VRs) for low power Devices 1
1.2 Motivation 4
1.3 Thesis outline 5
Chapter 2 Review of Buck Converter for Low-Power Application 7
2.1 Multi-Mode Low Quiescent Current Dc-Dc Buck Converter 7
2.2 Constant On-time Control 11
2.2.1 Review of Ripple-based Constant On-time Control 11
2.2.2 Review of V2 Constant On-time Control with Inductor Current Ramp 15
2.2.3 Review of Capacitor Current Constant On-time Control 17
Chapter 3 Proposed Ripple-Coupling Constant On-Time (RCCOT) Controlled Buck Converter 19
3.1 Circuit Diagram of Constant On-time Buck Converter with the Proposed Control scheme 20
3.2 Ripple Coupling Path 21
3.2.1 Transient Response of RCCOT Controlled Buck Converter 25
3.3 Digital On/off-Time Generator 28
3.4 Charge Pump-Based Error Amplifier 32
3.4.1 Charge Pump-Based Error Amplifier with A Discrete-Time Comparator 32
3.4.2 Charge Pump-Based Error Amplifier with A Dynamic Bias Comparator 36
3.5 Delay-Based Zero-Current Detector for DCM Operation 38
3.6 DCM Clamp Mechanism for Very-Light to Heavy Load Transient 42
Chapter 4 Circuit Implementation 45
4.1 Delay Chain for Digital On/Off-Time Generator 46
4.2 Ripple Coupling Path 51
4.2.1 Ripple Coupling Path with The External Ramp 56
4.3 Modulation Comparator 60
4.3.1 The Characteristics of Modulation Comparator 60
4.3.2 The Comparison of Comparator Architectures 61
4.3.3 The Modulation Comparator Design 64
4.4 Charge Pump-Based Error Amplifier 68
4.4.1 The Discrete-Time Comparator of The First Version of CPEA 69
4.4.2 Comparing Two Different CPEA Architectures 74
4.5 Zero-Current Detector 76
4.5.1 The Delay-Based Pulse Width Control Circuit 76
4.5.2 The Double-Tail Comparator in Calibration Loop 79
Chapter 5 Simulation and Measurement Results 85
5.1 The First Version of RCCOT Controlled Buck Converter 86
5.1.1 Introduction 86
5.1.2 Printed Circuit Board (PCB) Design 88
5.1.3 Measurement Results 90
5.2 The Second Version of RCCOT Controlled Buck Converter 96
5.2.1 Introduction 96
5.2.2 Simulation Results 97
Chapter 6 Conclusions and Future Works 104
6.1 Conclusions 104
6.2 Future Works 106
References 107
dc.language.isoen
dc.title低靜態電流且具快速暫態響應之漣波耦合固定導通時間降壓轉換器設計與實現zh_TW
dc.titleDesign and Implementation of A Ripple-Coupling Constant On-Time Controlled Buck Converter with Low-Quiescent Current and Fast Transient Responseen
dc.typeThesis
dc.date.schoolyear108-2
dc.description.degree碩士
dc.contributor.oralexamcommittee劉深淵(Shen-Iuan Liu),陳耀銘(Yaow-Ming Chen)
dc.subject.keyword低功率降壓型轉換器,高度數位化控制器,寬負載範圍,電荷幫浦,動態偏壓,電容電流固定導通時間控制之降壓轉換器,zh_TW
dc.subject.keywordlow-power buck converter,charge pump,constant on-time control,highly digital control,low quiescent current,wide load range,dynamic bias,en
dc.relation.page112
dc.identifier.doi10.6342/NTU202000931
dc.rights.note同意授權(全球公開)
dc.date.accepted2020-06-03
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電機工程學研究所zh_TW
dc.date.embargo-lift2023-06-05-
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