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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 呂良鴻(Liang-Hung Lu) | |
| dc.contributor.author | Wei-Wen Wang | en |
| dc.contributor.author | 王威文 | zh_TW |
| dc.date.accessioned | 2021-06-17T09:09:16Z | - |
| dc.date.available | 2024-11-04 | |
| dc.date.copyright | 2019-11-04 | |
| dc.date.issued | 2019 | |
| dc.date.submitted | 2019-10-17 | |
| dc.identifier.citation | [1] D. M. Pozar, Microwave Engineering, Hoboken, NJ: Wiley, 2012, pp. 673.
[2] B. Razavi, RF Microelectronic, 2nd ed. Upper Saddle River, NJ: Pearson, 2012, pp. 7-62 and pp. 255-305. [3] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE Journal of Solid-State Circuits, vol. 32, no. 5, pp. 745-759, May 1997. [4] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, 2nd ed. Upper Saddle River, NJ, USA: Prentice-Hall, Inc., 1996, pp. 217-228 and pp. 247-260. [5] S. C. Cripps, RF Power Amplifiers for Wireless Communications, 2nd ed. Nor-wood, MA, USA: Artech House, Inc., 2006, pp. 27-37 and pp. 311-314. [6] IEEE Standard 802.11a-1999. Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications-High-Speed Physical Layer in the 5 GHz Band, IEEE, 2000. Available: http://standards.ieee.org. Accessed 1 April 2013. [7] N. Dinur and D. Wulich, “Peak-to-average power ratio in high-order OFDM,” in IEEE Transactions on Communications, vol. 49, no. 6, pp. 1063-1072, June 2001. [8] H. S. Ruiz and R. B. Pérez, Linear CMOS RF power amplifiers : a complete design workflow, Boston, MA, US: Springer, 2014, pp. 20-24. [9] H.-S. Chen, “Analysis and Design of CMOS Transformer-Based RF Power Amplifiers,” Ph.D. Thesis, Graduate Institute of Electronics Engineering, College of Electrical Engineering and Computer Science, National Taiwan University, 2014. [10] M.-C. Yeh, Z.-M. Tsai, R.-C. Liu, K.-Y. Lin, Y.-T. Chang and H. Wang, “Design and analysis for a miniature CMOS SPDT switch using body-floating technique to improve power performance,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 1, pp. 31-39, Jan. 2006. [11] R. Chang, D. Weber, M. Lee, D. Su, L. Vleugels and S. Wong, “A fully integrated RF front-end with independent RX/TX matching and +20dBm output power for WLAN applications,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2007, pp. 564-565. [12] M. Terrovitis et al., “A 1x1 802.11n WLAN SoC with fully integrated RF front-end utilizing PA linearization,” in IEEE Proceedings of ESSCIRC, Athens, 2009, pp. 224-227. [13] Y. Wang, H. Wang, C. Hull, and S. Ravid, “A transformer-based broadband front-end combo in standard CMOS,” IEEE Journal of Solid-State Circuits, vol. 48, no. 8, pp. 1810-1819, Aug. 2012. [14] D. Chowdhury, C. D. Hull, O. B. Degani, Y. Wang and A. M. Niknejad, “A Fully Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G WiMax Applications,” IEEE Journal of Solid-State Circuits, vol. 44, no. 12, pp. 3393-3402, Dec. 2009. [15] H.-Y. Tsai, “Transceiver Frontend Co-design with PA Performance Enhancement Feedback loop,” M.S. Thesis Master Thesis, Graduate Institute of Electronics Engineering, College of Electrical Engineering and Computer Science, National Taiwan University, 2015. [16] F. Wang, D. Kimball, J. Popp, A. Yang, D. Lie, P. Asbeck, and L. Larson, “An improved power added efficiency 19 dBm hybrid envelope elimination and restoration power amplifier for 802.11g WLAN applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 54, no. 12, pp. 4086–4099, Dec. 2006. [17] D. Kang, B. Park, J. C. Zhao. Kim, D. Kim, J. Kim, Y. Cho, S. Jin, H. Jin, and B. Kim, “A 34% PAE, 26-dBm output power envelope tracking CMOS power amplifier for 10-MHz BW LTE applications,” in IEEE MTT-S Int. Microw. Symp. Dig., 2012, pp. 17–22. [18] P.-C. Wang et al., “A 2.4-GHz 25 dBm P-1 dB linear power amplifier with dynamic bias control in a 65-nm CMOS process,” in Proc. 34th Eur. Solid-State Circuits Conf, Sep. 2008, pp. 490–493. [19] Y. Yin, X. Yu, Z. Wang, and B. Chi, “An efficiency-enhanced stacked 2.4-GHz CMOS power amplifier with mode switching scheme for WLAN applications,” IEEE Transactions on Microwave Theory and Techniques, vol. 63, no. 2, pp. 672–682, Feb. 2015. [20] R. Shrestha, R. van der Zee, A. de Graauw and B. Nauta, “A Wideband Supply Modulator for 20 MHz RF Bandwidth Polar PAs in 65 nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 44, no. 4, pp. 1272-1280, April 2009. [21] C. P. Huang, J. Soricelli, L. Lam, M. Doherty, P. Antognetti and W. Vaillancourt, “Novel silicon-on-insulator SP5T switch-LNA front-end IC enabling concurrent dual-band 256-QAM 802.11ac WLAN radio operations,” in IEEE Radio Frequency Integrated Circuits Symposium, 2013, pp. 133-136. [22] O. Degani et al., “A 1x2 MIMO Multi-Band CMOS Transceiver with an Integrated Front-End in 90nm CMOS for 802.11a/g/n WLAN Applications,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2008, pp. 356-619. [23] C. Lee et al., “A multistandard, multiband SoC with integrated BT, FM, WLAN radios and integrated power amplifier,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2010, pp. 454–455. [24] C. Chang et al., “A CMOS transceiver with internal PA and digital pre-distortion for WLAN 802.11a/b/g/n applications,” in IEEE Radio Frequency Integrated Circuits Symposium, 2010, pp. 435–438. [25] S. Abdollahi-Alibeik et al., “A 65 nm dual-band 3-stream 802.11n MIMO WLAN SoC,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2011, pp. 170–172. [26] R. Kumar et al., “A fully integrated 2×2 b/g and 1×2 a-band MIMO WLAN SoC in 45nm CMOS for multi-radio IC,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2013, pp. 328-329. [27] T.-M. Chen et al., “A 2x2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5dBm in 55nm CMOS,” in IEEE Radio Frequency Integrated Circuits Symposium, June 2014, pp. 225–228. [28] R. Winoto et al., “A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2016, pp. 170-171. [29] H. Jeon et al., “A Triple-Mode Balanced Linear CMOS Power Amplifier Using a Switched-Quadrature Coupler,” IEEE Journal of Solid-State Circuits, vol. 47, no. 9, pp. 2019-2032, Sept. 2012. [30] C. Zhai and K. M. Cheng, “Dual-Mode CMOS RF Power Amplifier Design Us-ing a Novel Reconfigurable Single-Switch Single-Inductor Balun,” IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 10, pp. 4585-4594, Oct. 2018. [31] J. Kim et al., “A linear multi-mode CMOS power amplifier with discrete resizing and concurrent power combining structure,” IEEE Journal of Solid-State Circuits, vol. 46, no. 5, pp. 1034–1048, Apr. 2011. [32] B. Koo, T. Joo, Y. Na, and S. Hong, “A fully integrated dual-model CMOS pow-er amplifier for WCDMA applications,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, 2012, pp. 82–84. [33] Y. Lee and S. Hong, “A dual-power-mode output matching network for digitally modulated CMOS power amplifier,” IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 4, pp. 1570–1579, Apr. 2013. [34] D. Chowdhury, C. D. Hull, O. B. Degani, Y. Wang, and A. M. Niknejad, “A fully integrated dual-mode highly linear 2.4 GHz CMOS power amplifier for 4G Wi-Max applications,” IEEE Journal of Solid-State Circuits, vol. 44, no. 12, pp. 3393–3402, Dec. 2009. [35] H. Choi, D.-H. Lee, and S. Hong, “A triple-power-mode digital polar CMOS RF power amplifier with LO duty cycle control,” in IEEE Microwave and Wireless Components Letters, vol. 26, no. 9, pp. 702–704, Sep. 2016. [36] H. Ahn et al., “A fully integrated dual-mode CMOS power amplifier with an au-totransformer-based parallel combining transformer,” in IEEE Microwave and Wireless Components Letters, vol. 27, no. 9, pp. 833–835, Sep. 2017. [37] K. Wang, M. Jones, and S. Nelson, “The S-probe-a new, cost-effective, 4-gamma method for evaluating multi-stage amplifier stability,” in IEEE MTT-S Int. Microw. Symp. Dig., 1992, pp. 829-832. [38] L. Samoska et al., “On the stability of millimeter-wave power amplifiers,” in IEEE MTT-S Int. Microw. Symp. Dig., 2002, pp. 429-432. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/74872 | - |
| dc.description.abstract | 本論文以TSMC 90 nm CMOS製程實現兩個操作在5.2 GHz的功率放大器。第一個晶片結合了一個發射與接收的開關、一個低雜訊放大器與一個具有雙輸出功率模式的功率放大器，藉由將發射與接收開關納入功率放大器與低雜訊放大器的匹配網路，達到全積體化的共同設計，避免額外的晶片外元件與連接造成額外的損耗與成本，並且透過切換主動元件開起數目及變壓器的電壓與電流關係，可以使得兩種輸出功率模式的最佳組抗點移動到接近同一點。此晶片操作在接收模式的雜訊指數為3.8 dB，操作在傳輸模式時的輸出飽和功率分別為24.9 dBm與17.2 dBm.
第二個晶片透過一個包絡檢測器將輸入訊號轉換為一個相對應的值，並且經過比較電路後，自動調整對應的閘極偏壓，透過此一切換，在功率退後區域可以節省239毫安培的直流電流。 | zh_TW |
| dc.description.abstract | This thesis implements two power amplifiers operating at 5.2 GHz in a TSMC 90 nm CMOS process. The first chip combines a transmit and receive switch (T/R switch), a low noise amplifier and a power amplifier with dual output power modes. By incorporating the T/R switch into the matching network of the power amplifier and the low noise amplifier, a fully integrated co-design is achieved, avoiding additional losses and costs associated with additional off-chip components and connections. And by switching the number of active devices and the voltage-current relationship of the transformer, the optimal impedance of the two output power modes can be moved to near the same point. The chip operates with a noise figure of 3.8 dB in receive mode and an output saturation power of 24.9 dBm and 17.2 dBm when operating in transmit mode.
The second chip converts the input signal into a corresponding value through an envelope detector, and after the comparison circuit, automatically adjusts the correspond-ing gate bias, and by this switching, 239 mA quiescent current can be saved in the power back-off region. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T09:09:16Z (GMT). No. of bitstreams: 1 ntu-108-R05943176-1.pdf: 6430644 bytes, checksum: 618e5a3fac832b5db8345dbd63dac87d (MD5) Previous issue date: 2019 | en |
| dc.description.tableofcontents | Acknowledgement iii
Abstract v Contents vii List of Figures ix List of Tables xv Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 2 Chapter 2 Background 3 2.1 The Low Noise Amplifier 3 2.1.1 Noise figure and sensitivity 3 2.1.2 Linearity 5 2.1.3 Common-source stage with inductive degeneration 7 2.2 The Power Amplifier 9 2.2.1 The loadline theory 9 2.2.2 Fundamentals of wireless communications 11 2.3 On-Chip Transformers 14 2.3.1 Lumped model of transformers 14 2.3.2 Design parameters 15 2.4 The T/R Switch 19 Chapter 3 A 5.2-GHz TRX Frontend by T/R Switch, LNA, and Dual Power Mode PA Co-design 21 3.1 Chapter Guides 22 3.2 The Proposed System Architecture 24 3.3 Circuit Implementation 27 3.3.1 Co-design of LNA and T/R switch 27 3.3.2 Co-design of PA and T/R switch 33 3.4 Experimental Results 46 3.4.1 The receive mode 47 3.4.2 The transmit modes 50 3.5 Remarks 56 Chapter 4 A Power Amplifier for WLAN Applications with a Bias Switching Scheme 57 4.1 Chapter Guides 58 4.2 The proposed system architecture 60 4.3 Circuit Implementation 62 4.3.1 Bias switching scheme based on an envelope detector 63 4.3.2 The PA design with the bias switching scheme 68 4.4 Experimental Results 75 4.5 Remarks 82 Chapter 5 Conclusion 83 Reference 85 | |
| dc.language.iso | en | |
| dc.title | 具功率後退功率附加效益提升之功率放大器的實現與應用 | zh_TW |
| dc.title | Implementation and Application of RF Power Amplifier with Power Back-Off PAE Enhancement | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 108-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 郭建男(Chien-Nan Kuo),黃天偉(Tian-Wei Huang) | |
| dc.subject.keyword | 互補式金屬氧化物半導體,射頻,功率放大器,低雜訊放大器,收發開關,功率退後之功率附加效益提升, | zh_TW |
| dc.subject.keyword | CMOS,radio frequency,power amplifier,low noise amplifier,T/R switch,improvement of power back-off PAE, | en |
| dc.relation.page | 88 | |
| dc.identifier.doi | 10.6342/NTU201904215 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2019-10-17 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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