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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/74751完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳耀銘(Yaow-Ming Chen) | |
| dc.contributor.author | Shiang-Ren Jeng | en |
| dc.contributor.author | 鄭翔任 | zh_TW |
| dc.date.accessioned | 2021-06-17T09:06:57Z | - |
| dc.date.available | 2020-01-01 | |
| dc.date.copyright | 2019-12-26 | |
| dc.date.issued | 2019 | |
| dc.date.submitted | 2019-12-18 | |
| dc.identifier.citation | [1] Alex Lidow, J.S., Michael de Rooij, David Reusch, “GaN Transistors for Efficient Power Conversion.” 2014: WILEY.
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Reusch. “Comparison of deadtime effects on the performance of DC-DC converters with GaN FETs and silicon MOSFETs.” in 2016 IEEE Energy Conversion Congress and Exposition (ECCE). [22] Shirouchi, Y., H. Matsumori, and T. Shimizu. “ZVS/ZCS analysis for a three-phase PWM inverter using valley-fill snubber.” in 2017 IEEE 3rd International Future Energy Electronics Conference and ECCE Asia (IFEEC 2017 - ECCE Asia). [23] Xiang, J., et al. “Investigation of cascode stucture GaN devices in ZCS region of LLC resonant converter.” in 2017 IEEE Energy Conversion Congress and Exposition (ECCE). [24] Huang, Q., et al., “Predictive ZVS Control With Improved ZVS Time Margin and Limited Variable Frequency Range for a 99% Efficient, 130-W/in3 MHz GaN Totem-Pole PFC Rectifier.” IEEE Transactions on Power Electronics, 2019. 34(7): p. 7079-7091. [25] Ebli, M., M. Wattenberg, and M. Pfost. “Performance of a GaN-HEMT synchronous boost converter in ZVS and hard switching mode.” in 2016 18th European Conference on Power Electronics and Applications (EPE'16 ECCE Europe) [26] Miftakhutdinov, R. “New ZVS analysis of PWM converters applied to super-junction, GaN and SiC power FETs.” in 2015 IEEE Applied Power Electronics Conference and Exposition (APEC). [27] Huang, Q., et al. “Improved analysis, design and control for interleaved dual-phase ZVS GaN-based totem-pole PFC rectifier with coupled inductor.” in 2018 IEEE Applied Power Electronics Conference and Exposition (APEC). [28] Fujii, K., et al. “The improvement of efficiency in L-band 10W GaN HEMT power amplifier by harmonic injection.” in 2014 Asia-Pacific Microwave Conference. [29] Matsubara, H., F. Kawanabe, and T. Nojima. “A 2-GHz band experiment on efficiency enhancement of a GaN power amplifier using 2nd harmonic injection.” in 2008 Asia-Pacific Microwave Conference. [30] Lee, F.C. and Q. Li. “Overview of three-dimension integration for Point-of-Load converters.” in 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC). [31] Gao, S., et al. “Thermo-mechanical reliability of high-temperature power modules with metal-ceramic substrates and sintered silver joints.” in 2016 International Conference on Electronics Packaging (ICEP). [32] Jin, D. and J.A.d. Alamo. “Mechanisms responsible for dynamic ON-resistance in GaN high-voltage HEMTs.” in 2012 24th International Symposium on Power Semiconductor Devices and ICs. [33] Yang, F., et al. “Design of a Fast Dynamic On-Resistance Measurement Circuit for GaN Power HEMTs.” in 2018 IEEE Transportation Electrification Conference and Expo (ITEC). [34] Chu, R., et al., “1200-V Normally Off GaN-on-Si Field-Effect Transistors With Low Dynamic on -Resistance.” IEEE Electron Device Letters, 2011. 32(5): p. 632-634. [35] Ebli, M. and M. Pfost. “A novel gate driver approach using inductive feedback to increase the switching speed of power semiconductor devices.” in 2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe). [36] Ebli, M. and M. Pfost. “A Gate Driver Approach using Inductive Feedback to Decrease the Turn-on Losses of Power Transistors.” in PCIM Europe 2018; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management. [37] Nibir, S.J., D. Fregosi, and B. Parkhideh. “Investigations on circuits and layout for non-intrusive switch current measurements in high frequency converters using parallel GaN HEMTs.” in 2018 IEEE Applied Power Electronics Conference and Exposition (APEC). [38] Buetow, S. and R. Herzer. “Characterization of GaN-HEMT in cascode topology and comparison with state of the art-power devices.” in 2018 IEEE 30th International Symposium on Power Semiconductor Devices and ICs (ISPSD). [39] Wang, X., et al., “Effect of GaN Channel Layer Thickness on DC and RF Performance of GaN HEMTs With Composite AlGaN/GaN Buffer.” IEEE Transactions on Electron Devices, 2014. 61(5): p. 1341-1346. [40] Khandelwal, S., et al. “Dependence of GaN HEMT AM/AM and AM/PM non-linearity on AlGaN barrier layer thickness.” in 2017 IEEE Asia Pacific Microwave Conference (APMC). [41] Tsung Yu, C., et al. “Study of free-standing GaN substrates prepared by hydride vapor phase epitaxy technology.” in Proceedings of the Sixth Chinese Optoelectronics Symposium (IEEE Cat. No.03EX701). 2003. [42] Jin, Z., et al. “Epitaxial growth of GaN on porous Si (111) substrate.” in 2016 5th International Symposium on Next-Generation Electronics (ISNE). [43] Tektronix, “AFG1000 series function generator datasheet.” [44] Keysight, “33500B and 33600A series trueform waveform generators.” [45] Paul, C.R., “Introduction to Electromgnetic Compatibility.” 2006: Wiley. [46] Paul, C.R., “Inductance-Loop and Partial.” Wiley-IEEE Press. [47] Adammczyk, B., “Foundations of Electromagnetic Compatibility with Practicl Applications.” 2017: Wiley. [48] W.Ott, H., “Electromagnetic Compatibility Engineering.” Wiley. [49] Gonzalez, G., “Microwave Transistor Amplifiers Analysis and Design.” 1997: Prentice-Hall. [50] I.J. Bahl, D.K.T., “A Designer's Guide to Microstrip Line.” 1977, MicroWaves. [51] Gustrau, F., “RF and Microwave Engineering: Fundamentals of Wireless Communications”. 2012, Wiley. [52] Die Leiterplatte 2010, in Elektronik-Praxis. p. 72-77. [53] Verma, A., “An EMC/EMI system-design and testing methodology for FPD-Link lll SerDes.” Analog Application, 2017. [54] Olney, B., “Power Distribution Network Planning”, in The PCB Magazine. 2012. p. 62-68. [55] Ardizzoni, J., “A Practical Guide to High-Speed Printed-Circuit-Board Layout”, in Analog Dialog. [56] “MC34GD3000, Three Phase Field Effect Transistor Pre-driver - Data Sheet.” 2019, NXP. [57] “IGBT Gate Driver Evaluation Platform for 3-Phase Inverter System Design Guide.” 2015, Texas Instruments. [58] Schmid, R., “Measuring Board Parasitics in High-Speed Analog Design.” 2003, Texas Instruments. [59] “Counter-electromotive force”, Wikipedia. [60] Sherman, D., “Are We Losing Touch? A Comprehensive Comparison Test of Electric and Hydraulic Steering Assist”, in Car and Driver. 2012. [61] “Four-terminal sensing”, Wikipedia. [62]. “How will the petrol and diesel ban work?”, in BBC. 2018. [63] “Efficiency Compared: Battery-Electric 73%, Hydrogen 22%, ICE 13%.” Transport & Environment [64] Hanley, S., “Electric Car Myth Buster — Well-To-Wheel Emissions.” 2018, Clean Technica. [65] L.Athanasopouloua, H.B., P.Stavropoulos, “Well-to-wheel analysis of direct and indirect use of natural gas in passenger vehicles”, in CIRP Global Web Conference. 2018. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/74751 | - |
| dc.description.abstract | 氮化鎵功率電晶體因為其超凡的電氣特性，成為最具前景的新世代功率元件候選人之一。然而氮化鎵功率電晶體有個令人無法忽視的缺點，那就是它的閘極非常脆弱，以至於幾乎無法忍受任何電壓雜訊，否則會馬上損毀。因此，許多研究者與企業投入大量精力在探討如何正確評估與計算印刷電路板上的寄生元件，以避免寄生效應造成氮化鎵功率元件的損壞。這些針對寄生元件的嚴密估算與精密設計以往大多出現於積體電路類的超高速(兆赫等級以上)電路應用。當要使用軟體進行寄生參數萃取以進行電路模擬時，設計者將面臨挑戰。極致準確的參數萃取讓軟體設定變得冗長且許多環節容易出錯。縱使寄生參數被成功萃取，電路模擬與實際測試結果仍有差距。最終極且準確的辦法是將整個電路之物理模型進行軟體模擬，但這種全域模擬曠日費時且需強大電腦運算能力方可達成；此外，設計者須具備多領域的專業知識才可正確完成並解讀全域模擬。
這篇論文將會引入一個新的模擬流程，讓開發者更快速且準確的驗證所設計電路的寄生元件效應。這包含兩部分:第一部分為寄生參數的簡化萃取過程，以期透過軟體更迅速、可靠地計算參數量值，同時避開全域模擬繁瑣且易出錯的設定流程，終能維持準確性。第二部分為複合頻率分析方式，此方式依照不同權重，疊加多個頻率的電路模擬結果，降低單一頻率電路模擬時高頻響應易被犧牲的缺點；此外，在實際電路中許多寄生參數因難用集成元件等效其量值，其造成的訊號上升時間差也會對高頻響應造成影響，亦可透過此分析法提升準確性。本論文介紹了複合頻率選取的原理以及實務上的操作；同時透過所提出的精簡化參數萃取方式與複合頻率分析，再彙整眾多積體電路設計之電路佈局準則，完成了一款用於車用電子輔助動力方向盤的400瓦馬達逆變器和一款用於電動摩托車動力系統的2.2千瓦馬達逆變器。最終由實測驗證複合頻率寄生參驗證法之整套模擬流程的可適用性與設計成效。 | zh_TW |
| dc.description.abstract | Gallium Nitride High Electron Mobility Transistor (GaN HEMT) is one of the most promising candidates for next generation power devices due to its electrical characteristics. However, the Achilles’ heel of GaN HEMT is its fragile gate which does not tolerate voltage noise well. Researchers and companies have made great efforts on evaluating the parasitic effect of PCB layout that was often taken into consideration on IC-related high frequency (MHz or above) application in the past. Complicated simulation environment set-up often causes software conflicts and erroneous results. Even if the parameter is accurately extracted, circuit simulation result is often not decent enough. Most accurate methodology is to conduct an all-system simulation, which requires all-around background knowledge and is computation-intensive.
In this thesis, a new procedure for evaluating parasitic parameter on PCB design is introduced. It consists of two parts, the first part is a condensed process that use software to calculate parasitic and save great effort on environment establishment at the same time. The second part is a multi-frequency analysis that superimpose several circuit simulation results to form final waveform. This method could retain higher harmonics response of a certain signal compared to conventional single-frequency simulation. Response problem caused by parasitic that is hard to implement in software lumped components could also be addressed. The theoretical selection basics of multi-frequency analysis will be elaborated in this thesis. With new evaluation method and critical design principles consolidated in this thesis, a 400 W EPS motor drive inverter along with a 2.2 kW e-Scooter power train inverter is implemented to verify the applicability of proposed analysis methodology. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T09:06:57Z (GMT). No. of bitstreams: 1 ntu-108-R06921028-1.pdf: 7143927 bytes, checksum: 1ae3574bf51d7d542ff18a9ae3babae1 (MD5) Previous issue date: 2019 | en |
| dc.description.tableofcontents | 誌謝 III
中文摘要 IV ABSTRACT V CONTENTS VI LIST OF FIGURES IX LIST OF TABLES XV ABBREVIATIONS XVI CHAPTER 1 INTRODUCTION 1 1.1 INTRODUCTION OF GAN HEMT 1 1.2 APPLICATION CONCERN OF GAN HEMT AND MOTIVE 5 1.3 OUTLINE 8 CHAPTER 2 IMPACT OF PARASITIC EFFECT AND EMI ON CIRCUIT BEHAVIOR 10 2.1 PCB CONFIGURATION AND PARASITIC EFFECTS 10 2.1.1 Microstrip 11 2.1.2 Stripline 12 2.1.3 Via 14 2.1.4 Plane 15 2.2 PARASITIC ELEMENTS AND EMI 15 2.2.1 Coupling Mechanism 16 2.2.2 Ground Plane and Return Path 17 CHAPTER 3 LAYOUT STRATEGY AND MULTI-FREQUENCY ANALYSIS 19 3.1 DESIGN PRINCIPLES FOR HIGH FREQUENCY APPLICATION 19 3.1.1 PCB Stackup 20 3.1.2 Power and Ground Plane 22 3.1.3 Traces, Vias and other Layout Elements 23 3.1.4 Bypass Capacitors 24 3.2 GAN HEMT-BASED INVERTER LAYOUT DESIGN 26 3.2.1 Design Concept Software Simulation 27 3.2.2 Power Loop 31 3.2.3 Signal Loop 34 3.2.4 Current Flow and Heat Dissipation 35 3.3 MULTI-FREQUENCY ANALYSIS FOR PARASITIC PARAMETER VERIFICATION 38 3.3.1 Parasitic Parameter Extraction 40 3.3.2 Representative Simulation Frequency 45 3.3.3 Multi-frequency Analysis 52 CHAPTER 4 EXPERIMENTAL VERIFICATION 61 4.1 400W EPS MOTOR 63 4.1.1 Switching Behavior 65 4.1.2 Dynometer Test 68 4.1.3 Endurance Test and Temperature Performance 71 4.2 2.2KW E-SCOOTER POWER TRAIN 73 4.2.1 Switching Behavior 74 4.2.2 Dynometer Test 76 4.2.3 Endurance Test and Temperature Performance 79 CHAPTER 5 CONCLUSION AND FUTURE RESEARCH 81 5.1 SUMMARY AND MAJOR CONTRIBUTIONS 81 5.2 SUGGESTIONS FOR FUTURE RESEARCH 82 REFERENCES 83 | |
| dc.language.iso | en | |
| dc.title | 使用複合頻率分析之印刷電路板佈局寄生參數驗證 | zh_TW |
| dc.title | PCB Layout Parasitic Parameter Verification
Using Multi-Frequency Analysis | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 108-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 金藝璘(Katherine A. Kim),陳景然(Ching-Jan Chen),唐丞譽 | |
| dc.subject.keyword | 氮化鎵功率電晶體,電路寄生參數萃取法,多頻率分析,電磁干擾,印刷電路板線路布局,三相逆變器,車用馬達驅動, | zh_TW |
| dc.subject.keyword | GaN HEMT,parasitic parameter extraction,multi-frequency analysis,EMI,PCB layout design,three phase inverter,automotive motor drive, | en |
| dc.relation.page | 89 | |
| dc.identifier.doi | 10.6342/NTU201904401 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2019-12-19 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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