太陽能沾鑄矽晶片之研究

Abstract

隨著石化能源耗竭與全球暖化問題日趨嚴重，使用可再生能源日益重要，而 太陽光電因為發電便利與分散優勢，在各國政府的補助下過去十年成長高過百倍 之譜，設置成本也大幅下降。特別是矽晶太陽能電池，已達到$0.33/Wp以下的成 本，但其主要成本仍在於矽晶片的製造。儘管多晶矽的價格已跌落近$20/Kg，然而晶片製造仍需長晶與切片，使得晶片成本很難進一步下降。特別是切片成本目 前已經高於長晶成本非常多，一般多在$0.1/Wp以上，況且切割損失更高達40%以上。由此可見，目前的晶片製造的產業技術是相當沒有效率且高成本的方式。因此，無切割技術 (kerf-free)的晶片製造，尤其是沾鑄，一直是長晶技術很重視的一個領域，但晶片品質多半不如預期，主要就是晶片缺陷高，電池轉換效率不高。 在此論文裡，我們利用自行製作氮化矽(Si3N4)基板，控制在沾鑄過程中基板與矽融湯的潤濕性質，並使用可觀測的高溫爐，觀察在不同潤濕與控壓條件下，基板對熔融矽接觸過程，並將沾鑄之晶片做晶體評價，包括晶粒、晶向、與晶界的種類，少數載壽命等性質，探討基板與融湯溫度、接觸時間、基板移動方式對成核與晶片缺陷的影響，並改善製程參數，來提升晶片的品質。

With the shortage of fossil energy and global warming, the urgency of using renewal energy has driven the growth of photovoltaic (PV) industry very rapidly. The global annual installation has been grown over 100 times since 2000 and the annual installation in 2014 was expected to be over 40 GWp. With this rapid development, the silicon solar cell still remains the main stream in the market, and its production cost is lower than 33 cents/Wp. Nevertheless, the silicon wafer is still the major cost. More importantly, the slicing (about 10 cents/Wp) is much more costly than ingot growth, and the silicon kerf loss is over 40 %. Therefore, to further reduce the wafer cost, the development of kerf-free wafer technology is necessary. In fact, the kerf-free technology, such as dip casting, is not new. However, the wafer quality is still not good enough to compete with that from ingot growth due to the defect formation during crystal growth. In this research, we designed Si3N4 plates as a substrate, so that the wettability of the silicon melt could be controlled. An in-situ infrared rapid thermal furnace will be used to observe the effect of pressure and substrate on the shape of molten silicon on different substrate, so the thickness of the grown silicon can be controlled. Also, the wafer grain structures, such as the grain structure, grain size, grain orientation, and grain boundary evolution, will be investigated. The distribution of the thermal stress and dislocation, as well as the minority carrier lifetime can be measured. We will also modify and improve the process to achieve a better wafer quality by understanding the effect of the substratea temperature, casting speed, and cooling time.