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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/72949
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor林宗賢(Tsung-Hsien Lin)
dc.contributor.authorChun-Yuan Chiuen
dc.contributor.author邱俊元zh_TW
dc.date.accessioned2021-06-17T07:11:25Z-
dc.date.available2021-02-22
dc.date.copyright2021-02-22
dc.date.issued2021
dc.date.submitted2021-02-02
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[19] J. Pandey and B. P Otis, “A Sub-100 uW MICS/ISM Band Transmitter Based on Injection-Locking and Frequency Multiplication,” IEEE Journal of Solid-State Circuits, vol. 46, no. 5, pp. 1049-1058, May 2011.
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[21] V. D. Rezaei, S. J. Shellhammer, M. Elkholy, and K. Entesari, “A Fully Integrated 320 pJ/b OOK Super-Regenerative Receiver with −87 dBm Sensitivity and Self-Calibration,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 222-225, May 2016.
[22] A. Ba et al., “A 1.3 nJ/b IEEE 802.11ah Fully-Digital Polar Transmitter for IoT Applications,” IEEE Journal of Solid-State Circuits, vol. 51, no. 12, pp. 3103-3113, Dec. 2016.
[23] Y.-L. Tsai, J.-Y. Chen, B.-C. Wang, T. Y.-Yeh, and T.-H. Lin, “A 400MHz 10Mbps D-BPSK Receiver with a Reference-Less Dynamic Phase-to-Amplitude Demodulation Technique,” IEEE Symposium on VLSI Circuits, pp. 1-2, Jun. 2014.
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[26] J. Cheng, N. Qi, P.-Y. Chiang, and A. Natarajan, “A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65 nm CMOS,” IEEE Journal of Solid-State Circuits, vol. 49, no. 12, pp. 3018-3030, Dec. 2014.
[27] R.-H. Ni, K. Mayaram, and T.-S. Fiez, “A 915MHz, 6Mb/s, 80pJ/b BFSK Receiver with −76dBm Sensitivity for High Data Rate Wireless Sensor Networks,' IEEE Symposium on VLSI Circuits, pp. 1-2, Jun. 2014.
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[31] E. Kargaran, D. Manstretta, and R. Castello, “A Sub-1V, 220 μW Receiver Frontend for Wearable Wireless Sensor Network Applications,” IEEE International Symposium on Circuits and Systems, pp. 1–5, May 2017.
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[36] S. Byun, “Analysis and Verification of DLL-Based GFSK Demodulator Using Multiple-IF-Period Delay Line,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 1, pp. 6-10, Jan. 2017.
[37] C.-P. Chen et al., “A Low-Power 2.4-GHz CMOS GFSK Transceiver With a Digital Demodulator Using Time-to-Digital Conversion,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, no. 12, pp. 2738-2748, Dec. 2009.
[38] H. Cruz, H.-Y. Huang, S.-Y. Lee, and C.-H. Luo, “A 1.3 mW Low-IF, Current-Reuse, and Current-Bleeding RF Front-End for the MICS Band with Sensitivity of -97 dbm,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 6, pp. 1627-1636, Jun. 2015.
[39] E. Kargaran, D. Manstretta, and R. Castello, “Design and Analysis of 2.4 GHz 30 uW CMOS LNAs for Wearable WSN Applications,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 3, pp. 891-903, Mar. 2018.
[40] J. Pandey, J. Shi, and B. Otis, “A 120 uW MICS/ISM-band FSK Receiver with a 44 uW Low-Power Mode Based on Injection-Locking and 9x Frequency Multiplication,” IEEE International Solid-State Circuits Conference, pp. 460-462, Feb. 2011.
[41] M. Vidojkovic et al., “A 0.33nJ/b IEEE802.15.6/Proprietary-MICS/ISM Band Transceiver with Scalable Data-Rate from 11 kb/s to 4.5 Mb/s for Medical Applications,” IEEE International Solid-State Circuits Conference, pp. 170–171, Feb. 2014.
[42] C. Li and A. Liscidini, “Class-C PA-VCO Cell for FSK and GFSK Transmitters,” IEEE Journal of Solid-State Circuits, vol. 51, no. 7, pp. 1537-1546, Jul. 2016.
[43] J.-Y. Hsieh, Y.-C. Huang, P.-H. Kuo, T. Wang, and S.-S. Lu, “A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18-um CMOS Technology for Implantable Medical Applications,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 8, pp. 1123-1130, Aug. 2016.
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[45] Y. Shi, X. Chen, H. Kim, D. Blaauw, and D. Wentzloff, “A 606 uW mm-Scale Bluetooth Low-Energy Transmitter Using Co-Designed 3.5×3.5mm2 Loop Antenna and Transformer-Boost Power Oscillator,” IEEE International Solid-State Circuits Conference, pp. 442–444, Feb. 2019.
[46] A. Selvakumar, M. Zargham, and A. Liscidini, “A 600 uW Bluetooth low-energy front-end receiver in 0.13 um CMOS technology,” IEEE International Solid-State Circuits Conference, pp. 1–3, Feb. 2015.
[47] M.Vidojkovic et al., “A 0.8V 0.8mm2 Bluetooth5/BLE Digital-Intensive Transceiver with a 2.3mW Phase-Tracking RX Utilizing a Hybrid Loop Filter for Interference Resilience in 40nm CMOS,” IEEE International Solid-State Circuits Conference, pp. 446-448, Feb. 2018.
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[51] W. B. Wilson, U. Moon, K. R. Lakshmikumar, and L. Dai, “A CMOS Self-Calibrating Frequency Synthesizer,” IEEE Journal of Solid-State Circuits, vol. 35, no. 10, pp. 1437–1444, Oct. 2000.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/72949-
dc.description.abstract在近十年,低功耗無線技術蓬勃發展使人們更容易連接各種裝置。在可想像的未來,大量無線節點組成的物聯網可連結更多裝置,而射頻設備使用週期會被電池電量限制,使得大量維護射頻裝置變得困難。為了打造無電池的射頻環境,可以利用射頻或熱能收集電路為射頻節點提供能量。因為不需要更換電池,這些無電池的射頻節點可以降低人工成本,並且容易維護射頻系統。故低功耗、高感度的接收機與高效率的發射器是布建無電池射頻環境的關鍵電路。
本收發機工作電壓在0.6伏特,資料傳輸速率為200千比特每秒,操作頻率為429百萬赫茲的超低功耗頻移鍵控接收器。本接收器採用增強Q值低雜訊放大器來降低此電路功率消耗和頻率轉換時間技術去區分不同的時間週期來解調頻移鍵控訊號。本接收器在0.1%的誤碼率下提供-85分貝毫瓦的靈敏度,消耗功率為146微瓦。
本發射器工作電壓在0.6伏特,操作頻率為429百萬赫茲的頻移鍵控發射器。此發射器移除高功耗電路,如:功率放大器和鎖相迴路電路和採用振盪器通過匹配電路造成阻抗轉換,使震盪器直接驅動天線。本發射器消耗0.39毫瓦和提供 -8.2分貝毫瓦的輸出功率,並實現38.7%的整體效率。本收發機採用台積電90奈米CMOS工藝製造。
zh_TW
dc.description.abstractThe considerable development of mobile devices in recent decades has enabled people all over the world to connect more easily with each other. In the foreseeable future, the Internet-of-things is composed of numerous nodes that connect more devices, yet the lifetime of a RF device is limited by the battery energy. Numerous RF devices need replacement batteries that maintain the system difficulty. To implement the battery-less technology, RF energy or thermoelectric harvester was feasible to develop an autonomous power management system that supplies energy to RF nodes. Because the battery does not have to be changed, these battery-less RF nodes are useful for decreasing the labor cost and easily maintaining an RF system. Thus, a low-power high-sensitivity receiver and a high-efficiency transmitter are critical sub-circuits in the battery-less RF systems.
The 429-MHz ultralow-power frequency-shift keying transceiver operated at 0.6 V at 200 kb/s is presented in this work. The receiver used in this work employs a Q-enhanced LNA to lower current consumption and a proposed frequency-to-time-based technique that demodulates the output data by discriminating the corresponding date period. The proposed RX provides a sensitivity of −85 dBm at a bit error rate of 0.1% and consumes a power of 0.146 mW.
The 429-MHz frequency-shift keying transmitter is also operated at 0.6 V in this work. For eliminating circuits that consume high power, in particular power amplifier and phase-locked loop, the proposed TX adopts an oscillator that drives the antenna through an impedance matching network for power conversion. The TX consumes 0.39 mW, supplies an output power of −8.2 dBm, and achieves a global efficiency of 38.7%. The TRX was fabricated in TSMC 90-nm CMOS process.
en
dc.description.provenanceMade available in DSpace on 2021-06-17T07:11:25Z (GMT). No. of bitstreams: 1
U0001-3012202012433200.pdf: 7524418 bytes, checksum: 03a06c75f66a367c77c5736fb8f18dd1 (MD5)
Previous issue date: 2021
en
dc.description.tableofcontentsTable of Contents
中文審定書 i
英文審定書 iii
謝辭 vi
摘要 ix
Abstract x
List of Figures xv
List of Tables xix
Chapter 1 Introduction 1
1.1 Motivation 1
1.2 Operation Frequency Band 2
1.3 Modulation Scheme 3
1.4 Link Budget 4
1.5 Thesis Overview 5
Chapter 2 Introduction to Low-Power Wireless Transceiver 6
2.1 Basic Concepts of RF Design 6
2.1.1 Relationship Between NF and IIP3 7
2.1.2 Sensitivity and Data Rate 7
2.2 Low-Power Transceivers 8
2.2.1 PLL-Based Transceivers 8
2.2.2 OOK Transceiver 9
2.2.3 Injection-Locked FSK Transceiver 10
2.2.4 Injection-Locked D-BPSK Transceiver 12
2.2.5 Super-Regenerative Receiver 14
2.3 Conclusion 15
Chapter 3 Proposed Low-Power FSK Transceiver 17
3.1 System Consideration 17
3.2 RX Design Strategy of Gain 19
3.3 Proposed Transceiver Architecture 21
Chapter 4 Proposed FSK Receiver 23
4.1 LNA 23
4.1.1 Configuration LNAs 23
4.1.2 Low-Power LNA Techniques 30
4.1.3 Proposed LNA Description 31
4.2 Mixer 37
4.3 LCVCO 40
4.4 Limiting Amplifier 42
4.5 Demodulator 43
4.6 Simulated Specifications of Receiver 48
Chapter 5 Direct Power Transfer Transmitter and External Components 50
5.1 Transmitter Circuit Implementation 50
5.2 Analysis of Global Efficiency 51
5.3 Simulated Specifications of Transmitter 54
Chapter 6 Measurement Results and Setups 55
6.1 Measurement Environment Setup 55
6.2 Measurement Results 58
6.3 Comparison Table and Summary 65
Chapter 7 Calibration Technology 68
7.1 Q-enhancement Technique 69
7.2 Frequency Calibration Technology 70
7.3 Demodulator Calibration Circuit 73
7.4 Conclusion 76
Chapter 8 Conclusion 78
References 79
Publication List 87

dc.language.isoen
dc.subject頻率鍵移收發機zh_TW
dc.subject超低功耗zh_TW
dc.subject直接功率轉換zh_TW
dc.subjectQ值增強zh_TW
dc.subjectUltra-Low-Poweren
dc.subjectFSK Transceiveren
dc.subjectQ-enhanceden
dc.subjectDirect Power Transferen
dc.title使用增強Q值和直接功率轉換技巧之超低功耗頻率鍵移收發機zh_TW
dc.titleDesign of an Ultra-Low-Power FSK Transceiver by Using Q-enhanced and Direct Power Transfer Techniquesen
dc.typeThesis
dc.date.schoolyear109-1
dc.description.degree博士
dc.contributor.oralexamcommittee黃柏鈞(Po-Chiun Huang),曾英哲(Ying-Che Tseng),劉深淵(Shen-Iuan Liu),李泰成(Tai-Cheng Lee),陳信樹(Hsin-Shu Chen)
dc.subject.keyword超低功耗,頻率鍵移收發機,Q值增強,直接功率轉換,zh_TW
dc.subject.keywordUltra-Low-Power,FSK Transceiver,Q-enhanced,Direct Power Transfer,en
dc.relation.page88
dc.identifier.doi10.6342/NTU202004480
dc.rights.note有償授權
dc.date.accepted2021-02-03
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
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