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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳瑞北(Ruey-Beei Wu) | |
| dc.contributor.author | Wei-Ju Chang | en |
| dc.contributor.author | 張瑋儒 | zh_TW |
| dc.date.accessioned | 2021-06-17T06:16:34Z | - |
| dc.date.available | 2018-09-03 | |
| dc.date.copyright | 2018-09-03 | |
| dc.date.issued | 2018 | |
| dc.date.submitted | 2018-08-29 | |
| dc.identifier.citation | [1] The 2018 Ethernet Roadmap [Online]. Available: https://ethernetalliance.org/the-2018-ethernet-roadmap/
[2] J. Lee, P. C. Chiang, P. J. Peng, L. Y. Chen, and C. C. Weng, “Design of 56 Gb/s NRZ and PAM4 SerDes transceivers in CMOS technologies,” IEEE J. Solid-State Circuits, vol. 50, no.9, pp. 2061-2073, Sep. 2015 [3] H. Zhang, B. Jiao, Y. Liao, and G. Zhang, “PAM4 signaling for 56G serial link applications−A tutorial,” DesignCon, Jan. 2016 [4] J. He, N. Dikhaminjia, M. Tsiklauri, J. Drewniak, A. Chada, and B. Mutnury, “Equalization enhancement approaches for PAM4 signaling for next generation speeds,” IEEE 67th Electron. Compon. Technol. Conf., pp.1874-1879, 2017 [5] 鄭詠守，高效能背板互聯系統之眼圖預測與等化器設計，國立台灣大學碩士論文，2013年7月 [6] N. Dikhaminijia, J. He, E. Hernandez, M. Tsiklauri, J. Drewniak, A. Chada, M. Zvonkin, and B. Mutnury, “High-speed serial link challenges using multi-level signaling,” in IEEE 24th Electrical Perform. Electronic Packag. Syst. (EPEPS), 2015 [7] S. H. Hall and H. L. Heck, Advanced Signal Integrity for High-Speed Digital Designs, Chapter 13, John Wiley & Sons, Inc, 2009 [8] J. Park, J. J. Kim, S. Choi, Y. Kim, H. Kim, and J. Kim, “Eye-diagram estimation methods for voltage- and probability-dependent PAM4 signal on stacked through-silicon vias (TSVs),” IEEE 67th Electron. Compon. Technol. Conf., pp.1724-1731, 2017 [9] N. C. Chen, T. H. Hsieh, J. Jinn, P. H. Chang, F. Huang, J.W. Xiao, A. Chou, and B. Lin, “A novel system in package with fan-out WLP for high speed SerDes application,” IEEE 66th Electron. Compon. Technol. Conf., pp.1496-1501, 2016 [10] 張伯瑜，晶圓級系統構裝於高速串列通訊介面的訊號完整度設計，國立台灣大學碩士論文，2017年7月 [11] Sam Palermo, High-speed Links Circuits and Systems, Texas A&M University [12] M. Bassi, F. Radice, M. Bruccoleri, S. Erba and A. Mazzanti, “A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI,” IEEE Int. Solid-State Circuits Conf., pp. 66-68, 2016 [13] V. Stojanovic, A. Ho, W. Garlepp, F. Chen, J. Wei, G. Tsang, E. Alon, R. T. Kollipara, C. W. Werner, J. L. Zerbe and M. A. Horowitz, “Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery,” IEEE J. Solid-State Circuits, vol. 40, no.4, pp. 1012-1026, Sep. 2005 [14] J. Lee, Communication Integrated Circuits, National Taiwan University [15] IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet task force baseline summary [Online]. Available: http://www.ieee802.org/3/bs/baseline_3bs_0715.pdf [16] FEC performance with PAM4 on multi-part links [Online]. Available: http://www.ieee802.org/3/bs/public/15_05/anslow_3bs_03_0515.pdf [17] M. Wu, K. Qiu, and G. Zhang, “112Gbps Serial Transmission over Copper – PAM4 vs PAM8 Signaling,” DesignCon, Jan. 2017 | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71957 | - |
| dc.description.abstract | 針對網路交換機在高速串列解串列系統中的資料處理量規模增大，處理速率也增加，逐漸有PAM4取代應用於系統中。本論文提出可以透過PAM4最劣訊號列分析法，可以無需輸入長串的偽亂數二進位數列直接得到系統眼圖。其次，則提出眼圖優化演算法，透過PAM4峰值失真分析方法可選擇最佳有限脈衝響應濾波器係數。最後計算出NRZ與PAM4加上有限脈衝響應濾波器後，在系統中的佈線範圍，可以有效地辨別兩者編碼方式在系統中佈線的優勢區域。 | zh_TW |
| dc.description.abstract | The pursuit of larger data volume and higher switching speed in networking has emerges the 4-level pulse-amplitude modulation (PAM4) for the SerDes systems. In this thesis, the worst-case bits pattern method is proposed to derive the worst-case eye diagram for PAM4 without large PRBS simulation. Then, an optimization algorithm is established to search for the best finite impulse response (FIR) filter coefficients based on PAM4 extended peak distortion analysis (PDA) to improve PAM4 eye diagram efficiently. Finally, it is applied to calculate the suitable layout region for NRZ and PAM4 respectively, thereby addressing the preference zone for NRZ and PAM4. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T06:16:34Z (GMT). No. of bitstreams: 1 ntu-107-R05942008-1.pdf: 4686364 bytes, checksum: 8610dde7813750814e4de389bad7ae74 (MD5) Previous issue date: 2018 | en |
| dc.description.tableofcontents | 口試委員會審定書 i
致謝 ii 摘要 iii Abstract iv 第一章 緒論 1 1.1. 研究動機 1 1.2. 文獻回顧 3 1.3. 重要貢獻 3 1.4. 章節內容概述 4 第二章 理論 5 2.1. 高速SerDes系統層架構 5 2.1.1. 高速SerDes裝置 5 2.1.2. 高速SerDes的系統介紹 6 2.2. 高速SerDes晶片封裝層介紹 7 2.2.1. 晶圓級構裝堆疊製程應用 7 2.2.2. 重新分配層(Re-distribution layer, RDL) 7 2.2.3. 介質層(Build-up layer) 7 2.3. 眼圖形成的原理 9 2.3.1. 不歸零(Non-Return-to-Zero, NRZ)眼圖 9 2.3.2. 四階脈衝振幅調變(4-level Pulse Amplitude Modulation, PAM4)眼圖 10 2.4. NRZ與PAM4的SerDes模組介紹 12 2.5. 高頻損耗對於眼圖的影響 17 2.5.1. 高速SerDes訊號的頻寬 17 2.5.2. PAM4編碼補償通道損耗原理 19 第三章 四階脈衝振幅調變(PAM4)最劣眼圖分析 20 3.1. 基於脈波響應的最劣訊號序列 21 3.1.1. 線性非時變(Linear Time-Invariant System, LTI)系統 21 3.1.2. 脈波響應(pulse response) 21 3.1.3. 最劣訊號序列(worst-case bit patterns) 24 3.2. 快速眼圖重建基於峰值失真分析 32 3.3. PAM4最劣序列眼圖模擬 34 3.4. PAM4快速眼圖模擬 37 第四章 四階脈衝振幅調變(PAM4)眼圖等化設計 39 4.1. 眼圖失真原因 39 4.2. 有限脈衝響應濾波器電路(FIR)等化原理 41 4.3. PAM4等化器優化流程 42 4.3.1. 脈波響應與PAM4 PDA 42 4.3.2. Pattern search optimization優化FIR係數 44 4.3.3. 優化結果 45 4.4. PAM4眼圖優化模擬結果 46 4.5. 實驗結果 50 4.5.1. 實驗前的配置 50 4.5.2. 實驗前模擬 52 4.5.3. 實驗 55 第五章 NRZ與PAM4於高速SerDes系統中的比較 61 5.1. 整體系統架構 61 5.2. 分析流程 62 5.3. 分析結果 63 5.4. 傳輸功率的探討 65 第六章 結論 70 參考文獻 72 | |
| dc.language.iso | zh-TW | |
| dc.subject | 四階脈衝振幅調變 | zh_TW |
| dc.subject | 高速串列解串列系統 | zh_TW |
| dc.subject | 眼圖 | zh_TW |
| dc.subject | 有限脈衝響應濾波器 | zh_TW |
| dc.subject | 峰值失真分析法 | zh_TW |
| dc.subject | SerDes | en |
| dc.subject | finite impulse response | en |
| dc.subject | peak distortion analysis | en |
| dc.subject | 4-level pulse-amplitude modulation | en |
| dc.subject | eye diagram | en |
| dc.title | 脈衝振幅調變於高速串列解串列系統中眼圖分析與等化設計 | zh_TW |
| dc.title | Eye Diagram Analysis and Equalization Design of Pulse Amplitude Modulation in High Speed SerDes | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 106-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 吳宗霖,王文山,楊明宗,林丁丙 | |
| dc.subject.keyword | 四階脈衝振幅調變,高速串列解串列系統,眼圖,有限脈衝響應濾波器,峰值失真分析法, | zh_TW |
| dc.subject.keyword | 4-level pulse-amplitude modulation,SerDes,eye diagram,finite impulse response,peak distortion analysis, | en |
| dc.relation.page | 73 | |
| dc.identifier.doi | 10.6342/NTU201804089 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2018-08-29 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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| ntu-107-1.pdf 未授權公開取用 | 4.58 MB | Adobe PDF |
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