請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71870
完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林宗賢(Tsung-Hsien Lin) | |
dc.contributor.author | Tzu-Hsuan Yang | en |
dc.contributor.author | 楊子玄 | zh_TW |
dc.date.accessioned | 2021-06-17T06:12:50Z | - |
dc.date.available | 2023-10-12 | |
dc.date.copyright | 2018-10-12 | |
dc.date.issued | 2018 | |
dc.date.submitted | 2018-10-08 | |
dc.identifier.citation | [1] R. W. Erickson, D. Maksimovic, Fundamentals of Power Electronics 2/e, Springer, 2001.
[2] K. H. Chen, Power Management Techniques for Integrated Circuit Design, Wiley, 2016. [3] Y. K. Chen, “A Fast Response Low Jitter Constant On-Time Controlled Buck Converter,” National Taiwan University Master Thesis, Jan. 2018. [4] J. Baek, J. H. Lee, S. U. Shin, M. Y. Jung, and G. H. Cho, “Switched Inductor Capacitor Buck Converter with > 85% Power Efficiency in 100 uA-to-300 uA Loads using a Bang-Bang Zero-Current Detector,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, Apr. 2018. [5] R. Redl and J. Sun, “Ripple-Based Control of Switching Regulators—An Overview,” IEEE Transactions on Power Electronics, vol. 24, no. 12, pp. 2669-2680, Dec. 2009. [6] J. Li and F. C. Lee, “Modeling of V2 Current-Mode Control,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 57, no. 9, pp. 2552-2563, Sept. 2010. [7] C. L. Chen, W. J. Lai, T. H. Liu, and K. H. Chen, “Zero Current Detection Technique for Fast Transient Response in Buck DC-DC Converters,” IEEE International Symposium on Circuits and Systems, pp. 2214-2217, May 2008. [8] C. F. Lee and P. K. T. Mok, “A Monolithic Current-Mode CMOS DC–DC Converter With On-Chip Current-Sensing Technique,” IEEE Journal of Solid-State Circuits, vol. 39, no. 1, pp. 3-14, Jan. 2004. [9] C. Huang and P. K. T. Mok, “A Package Bondwire Based 80% Efficiency 80MHz Fully-Integrated Buck Converter with Precise DCM Operation and Enhanced Light-load Efficiency,” IEEE Asian Solid State Circuits Conference (A-SSCC), pp. 221-224, Nov. 2012. [10] W. C. Chen, H. C. Chen, M. W. Chien, Y. W. Chou, K. H. Chen, Y. H. Lin, T. Y. Tsai, S. R. Lin, and C. C. Lee, “Pseudo-Constant Switching Frequency in On-Time Controlled Buck Converter with Predicting Correction Techniques,” IEEE Transactions on Power Electronics, vol. 31, no. 5, pp. 3650-3662, May 2016. [11] W. Marcin, “Impact of Inductor Current Ringing in DCM on Output Voltage of DC-DC Buck Power Converters,” Archives of Electrical Engineering, vol. 66, no. 2, pp. 313-323, Jun. 2017. [12] B. Manai, M. Bouguelaa, and X. Rabeynin, “A 0.65-0.9-1.2V Supplies 10MHz High Efficiency PWM CMOS Buck DC-DC Converter,” IEEE International Conference on Electronics, Circuits and Systems, pp. 1123-1126, Dec. 2007. [13] S. Tian, F. C. Lee, P. Mattavelli, K. Y. Cheng, and Y. Yan, “Small-Signal Analysis and Optimal Design of External Ramp for Constant On-Time V2 Control With Multilayer Ceramic Caps,” IEEE Transactions on Power Electronics, vol. 29, no. 8, pp. 4450-4460, Aug. 2014. [14] Y. Y. Mai and P. K. T. Mok, “A Constant Frequency Output-Ripple-Voltage-Based Buck Converter Without Using Large ESR Capacitor,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 55, no. 8, pp. 748-752, Aug. 2008. [15] H. C. Chen, W. C. Chen, Y. W. Chou, M. W. Chien, C. L. Wey, K. H. Chen, Y. H. Lin, T. Y. Tsai, and C. C. Lee, “Anti-ESL/ESR Variation Robust Constant-on-time Control for DC-DC Buck Converter in 28nm CMOS Technology,” IEEE 2014 Custom Integrated Circuits Conference, pp. 1-4, Sept. 2014. [16] Y. C. Lin, C. J. Chen, D. Chen, and B. Wang, “A Novel Ripple-Based Constant On-Time Control with Virtual Inductance and Offset Cancellation for DC Power Converters,” IEEE Energy Conversion Congress and Exposition, pp. 1244-1250, Sept. 2011. [17] Y. Yan, P. H. Liu, F. Lee, Q. Li, and S. Tian, “V2 Control with Capacitor Current Ramp Compensation using Lossless Capacitor Current Sensing,” IEEE Energy Conversion Congress and Exposition, pp. 117-124, Sept. 2013. [18] J. H. Chen, P. J. Liu, and Y. J. E. Chen,” A Spurious Emission Reduction Technique for Power Amplifiers Using Frequency Hopping DC-DC Converters,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 145-148, Jun. 2009. [19] S. K. Dunlap and T. S. Fiez, “A Noise-Shaped Switching Power Supply Using a Delta–Sigma Modulator,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, no. 6, pp. 1051-1061, Jun. 2004. [20] J. J. Chen, Y. S. Hwang, J. H. Yu, Y. T. Ku, and C. C. Yu, “A Low-EMI Buck Converter Suitable for Wireless Sensor Networks With Spur-Reduction Techniques,” IEEE Sensors Journal, vol. 16, no. 8, pp. 2588-2597, Apr. 2016. [21] C. Tao and A. A. Fayed, “PWM Control Architecture With Constant Cycle Frequency Hopping and Phase Chopping for Spur-Free Operation in Buck Regulators,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 9, pp. 1596-1607, Sept. 2013. [22] M. Nashed and A. A. Fayed, “Current-Mode Hysteretic Buck Converter With Spur-Free Control for Variable Switching Noise Mitigation,” IEEE Transactions on Power Electronics, vol.33, no. 1, pp.650-664, Jan. 2018. [23] C. Tao and A. A. Fayed, “A Low-Noise PFM-Controlled Buck Converter for Low-Power Applications,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 12, pp.3071-3080, Dec. 2012. [24] Y. P. Su, Y. H. Lee, W. C. Chen, K. H. Chen, Y. H. Lin, T. Y. Tsai, C. C. Huang, and C. C. Lee, “A Pseudo-Noise Coded Constant-off-time (PNC-COT) Control Switching Converter with Maximum 18.7 dBm Peak Spur Reduction and 92% Efficiency in 40 nm CMOS,” Symposium on VLSI Circuits, pp. C170-C171, Jun. 2013. [25] X. Ke, J. Sankman, Y. Chen, L. He, and D. B. Ma, “A Tri-Slope Gate Driving GaN DC–DC Converter With Spurious Noise Compression and Ringing Suppression for Automotive Applications,” IEEE Journal of Solid-State Circuits, vol. 53, no. 1, pp. 247-260, Jan. 2018. [26] F. Su and W. H. Ki, “Digitally Assited Quasi-V2 Hysteretic Buck Converter with Fixed Frequency and without Using Large-ESR Capacitor,” IEEE International Solid-State Circuits Conference, pp. 446-447, 447a, Feb. 2009. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71870 | - |
dc.description.abstract | 在一個積體電路系統中,電源管理晶片扮演了相當重要的角色,其負責提供一個穩定的電壓源,本論文實作並量測兩個直流對直流降壓轉換器。
第一個作品驗證了漣波控制固定導通時間降壓轉換器,在負載較輕時具有變頻的功能,進而提升漣波控制在輕載時的效率。本作品輸入電壓為三點三伏特,輸出電壓為一點二伏特,並使用一微米亨利的電感及四點七微米法拉的電容,操作頻率為二百五十萬赫茲,輸出電流最高可達到一點七安培,最高效率為90.4 %,與定頻控制相比,輕載效率可由70.3 %提升至76.4%。 第二個作品改善了第一個作品的輸出漣波問題,並實作一個可降電磁干擾的導通時間產生器,使得輸出的功率頻譜密度,不會透過電磁干擾影響後方電路。本作品使用了積層陶瓷電容,即使在輸出電容的寄生電阻很小的狀況下,藉由電流迴授維持系統的穩定度,且透過雙迴授路徑,進而消除漣波控制固有的輸出電壓的直流準位問題。本作品輸入電壓為三點三伏特,輸出電壓為一點二伏特,使用一微米亨利的電感及四點七微米法拉的電容。輸出電流最高可達到一點七安培,最高效率為89.13 %,在定頻模式下,輸出電壓漣波為十毫米伏特,操作頻率藉在二百五十萬赫茲到五百五十萬赫茲間,且與定頻模式相比展頻的輸出功率頻譜密度可下降二十點七三分貝。 | zh_TW |
dc.description.abstract | Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages. Two DC-DC converters are implemented and verified in this thesis.
The first work verifies that the ripple-based constant on-time controlled buck converter under light load condition has the characteristic of pulse frequency modulation (PFM). With this merit it can improve the efficiency. This work steps down the input voltage 3.3 V to the output voltage is 1.2 V and realizes with 1 μH inductor and 4.7 μF capacitor. The switching frequency is 2.5 MHz. The maximum output current is 1.7 A. The maximum efficiency is 90.4 %. Comparing with the efficiency of the constant frequency control, our work can improve the efficiency from 70.3 % to 76.4 %. The second work improves the problems of output voltage ripple in the first work and implements an EMI reduction on-time generator. The output power spectral density will not affect the back-end circuit through the electromagnetic interference. This work utilizes the multi-layer ceramic capacitor as the output capacitor. Even the value of parasitic resistance is small. The system can be stable by using current feedback loop. By using the voltage square feedback path, this converter eliminates the inherent dc offset voltage in the ripple-based constant on-time control. This work is realized with 1 μH inductor and 4.7 μF capacitor. The input voltage is 3.3 V and the output voltage is 1.2 V. The maximum output current is 1.7 A. The maximum efficiency is 89.13 %. The output ripple is 10 mV in constant frequency mode. The switching frequency is operated between 2.5 MHz to 5.5 MHz. Comparing with the constant frequency operation the output power spectral density of spread spectrum mode can be reduced 20.73 dB. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T06:12:50Z (GMT). No. of bitstreams: 1 ntu-107-R05943010-1.pdf: 5816573 bytes, checksum: 887dfd5495f4c0d0871d224a31b9ca07 (MD5) Previous issue date: 2018 | en |
dc.description.tableofcontents | 中文審定書 i
英文審定書 iii 摘要 vii Abstract viii List of Figures xv List of Tables xx Chapter 1 Introduction 1 1.1 Introduction to Power Management IC and Motivation 1 1.2 Thesis Overview 2 Chapter 2 Fundamentals of Buck Converter 3 2.1 A Brief Overview of Buck Converter 3 2.1.1 Theory of Operation 3 2.1.2 Steady-State Analysis 6 2.1.3 Calculation of Output Voltage Ripple 10 2.1.4 Efficiency 12 2.1.5 Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM) 15 2.2 Control Methods of Buck Converter 17 2.2.1 Voltage-Mode Control 18 2.2.2 Current-Mode Control 20 2.2.3 Ripple-Based Control 21 2.3 Summary 25 Chapter 3 Design of a Ripple-Based Constant On-Time Controlled with ZCD Technique Buck Converter 27 3.1 Introduction 27 3.1.1 Operation of the Ripple-Based Constant On-Time Controlled Buck Converter 27 3.1.2 Stability 28 3.1.3 Characteristic of PWM and PFM 31 3.1.4 Specification 34 3.2 Circuit Implementation 34 3.2.1 System Architecture 34 3.2.2 On-Time Generator 35 3.2.3 Minimum Off-Time Generator 36 3.2.4 Zero-Current Detector 38 3.2.5 Comparator 39 3.2.6 Dead-Time Control and Driver 43 3.3 Simulation Results 44 3.4 Measurement Results 50 3.4.1 Chip Pin Configurations 50 3.4.2 Measurement Setup 51 3.4.3 Measurement Results 52 3.4.4 Comparison Table 62 Chapter 4 Design of a Small-ESR Current-Mode V2 Control with On-Time Controlled Spur-Free Buck Converter 63 4.1 Introduction 63 4.1.1 Stability and Output Voltage Ripple 63 4.1.2 DC Regulation 64 4.1.3 Analysis of Switching Frequency Variation to Reduce Electromagnetic Interference 65 4.1.4 Specification 67 4.2 Circuit Implementation 67 4.2.1 System Architecture 68 4.2.2 Current sensor 69 4.2.3 V2 Control 70 4.2.4 Pseudo-random-number (PRN) Generator 75 4.2.5 Binary-to-Thermometer Decoder 76 4.2.6 Spur-Free On-Time Generator 77 4.3 Simulation Results 79 4.4 Measurement Results 87 4.4.1 Chip Pin Configurations 87 4.4.2 Measurement Setup 88 4.4.3 Measurement Results 89 4.4.4 Comparison Table 96 Chapter 5 Conclusion and Future Works 97 5.1 Conclusions 97 5.2 Future Works 97 References 99 | |
dc.language.iso | en | |
dc.title | 漣波控制固定導通時間降壓轉換器之設計 | zh_TW |
dc.title | Design of the Ripple-Based Constant On-Time Controlled Buck Converters | en |
dc.type | Thesis | |
dc.date.schoolyear | 107-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 陳信樹(Hsin-Shu Chen),劉深淵(Shen-Iuan Liu) | |
dc.subject.keyword | 漣波控制,固定導通時間,降壓轉換器, | zh_TW |
dc.subject.keyword | Ripple-based control,Constant on-time control,Buck converter, | en |
dc.relation.page | 102 | |
dc.identifier.doi | 10.6342/NTU201804185 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2018-10-08 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
文件中的檔案:
檔案 | 大小 | 格式 | |
---|---|---|---|
ntu-107-1.pdf 目前未授權公開取用 | 5.68 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。