請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71535完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳景然(Ching-Jan Chen) | |
| dc.contributor.author | Zih-Yuan Zeng | en |
| dc.contributor.author | 曾子源 | zh_TW |
| dc.date.accessioned | 2021-06-17T06:02:42Z | - |
| dc.date.available | 2029-12-31 | |
| dc.date.copyright | 2019-01-30 | |
| dc.date.issued | 2019 | |
| dc.date.submitted | 2019-01-29 | |
| dc.identifier.citation | G. Lowney, 'Why Intel is designing multi-core processors,' May, 2006.
J. He and L. Qi, 'Cloud Power Management on Intel Platforms,' Intel Developer forum, April, 2010. R. R. Schaller, 'Moore's law: past, present and future,' in IEEE Spectrum, vol. 34, no. 6, pp. 52-59, June 1997. Victor H., “Moore's law is coming to an end,” published online at https://www.phonearena.com/news/Moores-Law-is-coming-to-an-end_id54127, Mar. 2014. S. E. Thompson, S. Parthasarathy, “Moore's law: the future of Si microelectronics,” in Materialstoday, vol. 9, no. 6, pp. 20-25, June 2006. K.G. Coffman and A.M. Odlyzko, “Is there a Moore’s law for data traffic?,” Handbook of Massive Data Sets, pp. 47-93, Kluwer, 2002. S. Writer, “Smartphone chips about to get smaller as Samsung unveils next-gen chip manufacturing process,” published online at tech.thaivisa.com, Feb. 2015. V. K. Sharma, 'Effect of device scaling for low power environment,' Report and Opinion, Mar. 2011, pp. 24-30 C. C. Hu, 'MOSFETs in ICs—scaling, leakage, and other topics,' Modern Semiconductor Devices for Integrated Circuits, pp. 259-289, Pearson, 2009. A. P. Chandrakasan and R. W. Brodersen, 'Minimizing power consumption in digital CMOS circuits,' in Proceedings of the IEEE, vol. 83, no. 4, pp. 498-523, April 1995. Intel, 'Voltage Regulator-Down (VRD) 11.1, Processor Power Delivery Design Guidelines for Desktop LGA775 Socket,' Intel Corp., September, 2009. K. Lee, “Advanced control schemes for voltage regulators,” Ph.D. Dissertation, Virginia Tech, Apr. 2009 Xunwei Zhou, Pit-Leong Wong, Peng Xu, F. C. Lee and A. Q. Huang, 'Investigation of candidate VRM topologies for future microprocessors,' in IEEE Transactions on Power Electronics, vol. 15, no. 6, pp. 1172-1182, Nov. 2000 G. Capponi, L. Minneci, F. Librizzi and P. Scalia, 'Multiphase voltage regulator module with transient step changing phases,' PowerCon 2000. 2000 International Conference on Power System Technology. Proceedings (Cat. No.00EX409), Perth, WA, Australia, 2000, pp. 463-467 vol.1 P. Xu, X. Zhou, P. Wong, K. Yao, and F. C. Lee, 'Interleaved VRM cuts ripple, improves transient step changing phase,' Proc. PCIM Power Electronics System, February, 2001, pp. 70-78 H. Kim, G. Seo, B. Cho and H. Choi, 'A Simple Average Current Control With On-Time Doubler for Multiphase CCM PFC Converter,' in IEEE Transactions on Power Electronics, vol. 30, no. 3, pp. 1683-1693, March 2015. P. Cheng, M. Vasic, J. A. Oliver, P. Alou, and J. A. Cobos, “Minimum time control for multiphase buck converter: Analysis and application,” in IEEE Transaction on Power Electronics, vol. 29, no. 2, pp. 958–967, Feb. 2014 Y. Qiu, M. Xu, K. Yao, J. Sun and F. C. Lee, 'Multifrequency Small-Signal Model for Buck and Multiphase Buck Converters,' in IEEE Transactions on Power Electronics, vol. 21, no. 5, pp. 1185-1192, Sept. 2006. S. K. Mazumder, M. Tahir and K. Acharya, 'Master–Slave Current-Sharing Control of a Parallel DC–DC Converter System Over an RF Communication Interface,' in IEEE Transactions on Industrial Electronics, vol. 55, no. 1, pp. 59-66, Jan. 2008. A. Borrell, M. Castilla, J. Miret, J. Matas and L. G. de Vicuna, 'Simple Low-Cost Hysteretic Controller for Multiphase Synchronous Buck Converters,' in IEEE Transactions on Industrial Electronics, vol. 58, no. 6, pp. 2355-2365, June 2011. J. Abu-Qahouq, Hong Mao and I. Batarseh, 'Multiphase voltage-mode hysteretic controlled DC-DC converter with novel current sharing,' in IEEE Transactions on Power Electronics, vol. 19, no. 6, pp. 1397-1407, Nov. 2004 Shiguo Luo, Zhihong Ye, Ray-Lee Lin and F. C. Lee, 'A classification and evaluation of paralleling methods for power supply modules,' in 30th Annual IEEE Power Electronics Specialists Conference. Record. (Cat. No.99CH36321) B. Sahu, 'Analysis and design of a fully-integrated current sharing scheme for multi-phase adaptive on -time modulated switching regulators,' in Proc. 2008 IEEE Power Electronics Specialists Conference, Rhodes, 2008, pp. 3829-3835. Richtek Technology, “Two Phases Synchronous Buck PWM Controller,” RT 8807A/B datasheet, October, 2008. Richtek Technology, “I^2 CProgrammable Linear Single Cell Li-Ion Battery Charger with Auto Power-Path Management and USB/AV Switch,” RT 9258 datasheet, July, 2008. Richtek Technology, “4/3/2/1-Phase PWM Controller with Embedded Drivers for CPU Core Power Supply,” RT 8857 datasheet, February, 2009. Texas Instruments, “TPS53667 6-Phase, D-CAP+, Step-Down, Buck Controller with NVM and PMBus™ Interface for ASIC Power and High-Current Point-of-Load,” ' TPS53667 datasheet,'., February, 2017. J. Li and F. C. Lee, 'New Modeling Approach for Current-Mode Control,' 2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition, Washington, DC, 2009, pp. 305-311. J. Li and F. C. Lee, 'New Modeling Approach and Equivalent Circuit Representation for Current-Mode Control,' in IEEE Transactions on Power Electronics, vol. 25, no. 5, pp. 1218-1230, May 2010. S. Tian, F. C. Lee, J. Li, Q. Li and P. Liu, 'Equivalent circuit model of constant on-time current mode control with external ramp compensation,' in 2014 IEEE Energy Conversion Congress and Exposition (ECCE), Pittsburgh, PA, 2014, pp. 3747-3754. S. Tian, F. C. Lee, Q. Li and Y. Yan, 'Unified Equivalent Circuit Model and Optimal Design of V^2 Controlled Buck Converters,' in IEEE Transactions on Power Electronics, vol. 31, no. 2, pp. 1734-1744, Feb. 2016. S. Tian, F. C. Lee, P. Mattavelli and Y. Yan, 'Small-Signal Analysis and Optimal Design of Constant Frequency V^2Control,' in IEEE Transactions on Power Electronics, vol. 30, no. 3, pp. 1724-1733, March 2015. S. Tian, F. C. Lee, P. Mattavelli, K. Cheng and Y. Yan, 'Small-Signal Analysis and Optimal Design of External Ramp for Constant On-Time V^2Control With Multilayer Ceramic Caps,' in IEEE Transactions on Power Electronics, vol. 29, no. 8, pp. 4450-4460, Aug. 2014. R. Redl and J. Sun, 'Ripple-Based Control of Switching Regulators—An Overview,' in IEEE Transactions on Power Electronics, vol. 24, no. 12, pp. 2669-2680, Dec. 2009. M. Tsai, D. Chen, C. Chen, C. Chiu and W. Chang, 'Modeling and design of current balancing control in voltage-mode multiphase interleaved voltage regulators,' in Proc. The 2010 International Power Electronics Conference - ECCE ASIA -, Sapporo, 2010, pp. 881-887. C. Cheng, C. Chen and S. Wang, 'Small-Signal Model of Flyback Converter in Continuous-Conduction Mode With Peak-Current Control at Variable Switching Frequency,' in IEEE Transactions on Power Electronics, vol. 33, no. 5, pp. 4145-4156, May 2018. J. Sun, Y. Qiu, M. Xu and F. C. Lee, 'High-Frequency Dynamic Current Sharing Analyses for Multiphase Buck VRs,' in IEEE Transactions on Power Electronics, vol. 22, no. 6, pp. 2424-2431, Nov. 2007. J. Sun, Y. Qiu, B. Lu, M. Xu, F. C. Lee and W. C. Tipton, 'Dynamic performance analysis of outer-loop current sharing control for paralleled DC-DC converters,' in Twentieth Annual IEEE Applied Power Electronics Conference and Exposition, 2005. APEC 2005., Austin, TX, 2005, pp. 1346-1352 Vol. 2. J. Sun, F. C. Lee, M. Xu and Y. Qiu, 'Modeling and Analysis for Beat-Frequency Current Sharing Issue in Multiphase Voltage Regulators,' in 2007 IEEE Power Electronics Specialists Conference, Orlando, FL, 2007, pp. 1542-1548. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/71535 | - |
| dc.description.abstract | 定導通時間控制(COT)的多相降壓型轉換器被廣泛使用於需要高效率和低電壓高輸出電流的應用中,為了避免熱的問題並且提高效率,需要均流迴路來平衡每一相的電感電流,然而,在以前的文獻中都沒有完整的分析以及研究如何設計均流迴路的參數。
在本論文中,對上述的轉換器控制方法進行了許多層面的分析,首先,推導了具有均流迴路的固定導通控制的每一相電感電流分佈方程式,由推導出來的式子,可以看出不同元件的參數對電感電流分佈的影響。其次,利用蒙地卡羅方法(Monte Carlo methods)的結果,可以知道如何挑選元件的誤差範圍以及如何設計均流回路的參數來符合均流的規範。然後,推導了均流迴路的小訊號模型,它可以用來分析均流迴路的穩定度以及暫態時的響應狀況,另外,也探討了均流迴路與電壓回路的關係,這些分析提供了設計均流迴路時的依據。最後,透過實測結果驗證了所提出的小訊號模型。 | zh_TW |
| dc.description.abstract | Multi-phase buck converter configuration with constant on-time (COT) control scheme has been widely used in many high-efficiency, low-voltage high-current computer power applications. To avoid thermal issue and increase efficiency, a current balance control scheme is required to balance per-phase inductor currents. However, it lacks comprehensive analysis and design of current balance loop in literature.
In this thesis, analyses are performed for several aspects of the above-mentioned converter-controller configuration. First, per-phase D.C. current equations are derived for COT control scheme with current balance loop. From the equations, the relation between component parameters and current distribution can be obtained. Second, Monte Carlo results give a reference to choose mismatch range of component and design current balance loop parameter to meet the current balance specification. Third, small-signal models are developed which can be used to predict stability and transient response performance. Besides, the relation between the current balance loop and the voltage regulation loop is discussed. The analytical results provide a design guideline of the current balance loop. Finally, the proposed model was verified with experimental results. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T06:02:42Z (GMT). No. of bitstreams: 1 ntu-108-R05921110-1.pdf: 2855800 bytes, checksum: df9eac6084e70a1064ad7cdfb448ae6c (MD5) Previous issue date: 2019 | en |
| dc.description.tableofcontents | 口試委員審定書 I
致謝 II 中文摘要 III Abstract IV Table of Contents V List of Figures VIII List of Tables XI Chapter 1 Introduction 1 1.1 Trend of Microprocessor 1 1.2 Advantages of Multiphase Converter Topology 2 1.3 Current Unbalance Issue in Multiphase Converter 4 1.4 Research Motivation and Thesis Outline 5 Chapter 2 Steady State Current Distribution Analysis of Two-Phase COT Controlled Buck Converter 7 2.1 Description of Circuit Topology 7 2.1.1 Description of CMCOT Control 7 2.1.2 Description of CMCOT Control with Current Balance Loop 11 2.2 Derivation of Steady State Current Distribution 13 2.2.1 Derivation of Open Loop Single Phase Current Equations 13 2.2.2 Derivation of Two-phase Current Distribution Equations with Voltage Loop Only 15 2.2.3 Derivation of Current Distribution Equations with Both a Voltage Loop and a Current Balance Loop 18 2.3 Monte Carlo Analysis by Excel 24 Chapter 3 Small Signal Model of Current Balance Loop and Voltage Loop 28 3.1 Small Signal Model of Current Balance Loop 28 3.1.1 DC gain versus stability 32 3.1.2 Transient Response Comparisons 33 3.2 Small Signal Model of Voltage Loop 35 3.3 Current Balance Loop Gain (Tcb) with Mismatched Parameters 47 3.4 Extension to Converters with Higher Number of Phases 49 Chapter 4 Verification of the Proposed Models by Experiment 51 4.1 Platform Introduction 51 4.2 Steady State Current Distribution Results 53 4.3 Small Signal Verification 57 Chapter 5 Conclusions and Future Works 59 5.1 Conclusions 59 5.2 Future Works 59 Appendix A Extend Current Distribution Equations to More Phases Converters 61 Appendix B Derivation of Current Balance Loop Small Signal Model 65 B.1 Deriving Gid11-Gid12 Transfer Function 65 B.2 Deriving Gton1 Transfer Function 66 B.3 Deriving DCR1 Transfer Function 68 B.4 Deriving Other Blocks in the Block Diagram 69 Appendix C SIMPLIS Simulation Model for Tcb 71 Appendix D Another Proposed Current Sharing Scheme for CMCOT Control 72 Appendix E Small Signal Model of the Proposed Current Sharing Method in Appendix D 74 Reference 78 | |
| dc.language.iso | en | |
| dc.subject | 直流/直流轉換器 | zh_TW |
| dc.subject | 多相降壓轉換器 | zh_TW |
| dc.subject | 定導通時間控制 | zh_TW |
| dc.subject | 均流迴路 | zh_TW |
| dc.subject | 小訊號模型 | zh_TW |
| dc.subject | constant on-time (COT) control | en |
| dc.subject | current balance loop | en |
| dc.subject | small signal model | en |
| dc.subject | multiphase buck converter | en |
| dc.subject | DC/DC converter | en |
| dc.title | 固定導通時間控制多相降壓型轉換器之均流迴路分析與設計 | zh_TW |
| dc.title | Analysis and Design of Current-balance Loop in Multiphase Buck Converters with Constant On-time Control | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 107-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 陳德玉(Dan Chen),林宗賢(Tsung-Hsien Lin),陳耀銘(Yaow-Ming Chen) | |
| dc.subject.keyword | 直流/直流轉換器,多相降壓轉換器,定導通時間控制,均流迴路,小訊號模型, | zh_TW |
| dc.subject.keyword | DC/DC converter,multiphase buck converter,constant on-time (COT) control,current balance loop,small signal model, | en |
| dc.relation.page | 83 | |
| dc.identifier.doi | 10.6342/NTU201900195 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2019-01-29 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位: | 電機工程學系 | |
文件中的檔案:
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-108-1.pdf 未授權公開取用 | 2.79 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。
