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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 鄭振牟 | |
| dc.contributor.author | Yuan-Che Hsu | en |
| dc.contributor.author | 許遠哲 | zh_TW |
| dc.date.accessioned | 2021-06-17T03:09:19Z | - |
| dc.date.available | 2018-07-26 | |
| dc.date.copyright | 2018-07-26 | |
| dc.date.issued | 2018 | |
| dc.date.submitted | 2018-07-23 | |
| dc.identifier.citation | [1] G. Locke and P. Gallagher, “Fips pub 186-3: Digital signature standard (dss),” Federal Information Processing Standards Publication, vol. 3, pp. 186–3, 2009.
[2] N. Shylashree and V. Sridhar, “Efficient implementation of scalar multiplication for ecc in gf (2m) on fpga,” in Emerging Research in Electronics, Computer Science and Technology (ICERECT), 2015 International Conference on, pp. 472–476, IEEE, 2015. [3] M. Imran, M. Kashif, and M. Rashid, “Hardware design and implementation of scalar multiplication in elliptic curve cryptography (ecc) over gf (2163) on fpga,” in Information and Communication Technologies (ICICT), 2015 International Conference on, pp. 1–4, IEEE, 2015. [4] S. Liu, L. Ju, X. Cai, Z. Jia, and Z. Zhang, “High performance fpga implementation of elliptic curve cryptography over binary fields,” in Trust, Security and Privacy in Computing and Communications (TrustCom), 2014 IEEE 13th International Conference on, pp. 148–155, IEEE, 2014. [5] Z. U. Khan and M. Benaissa, “High speed ecc implementation on fpga over gf (2 m),” in Field Programmable Logic and Applications (FPL), 2015 25th International Conference on, pp. 1–6, IEEE, 2015. [6] B. Gövem, K. Järvinen, K. Aerts, I. Verbauwhede, and N. Mentens, “A fast and compact fpga implementation of elliptic curve cryptography using lambda coordinates,” in International Conference on Cryptology in Africa, pp. 63–83, Springer, 2016. [7] R. K. Kodali, L. Boppana, A. Saikiran, and C. N. Amanchi, “Fpga implementation of multiplication algorithms for ecc,” in Advances in Computing, Communications and Informatics (ICACCI), 2015 International Conference on, pp. 549–554, IEEE, 2015. [8] K. C. Loi, S. An, and S.-B. Ko, “Fpga implementation of low latency scalable elliptic curve cryptosystem processor in gf (2 m),” in Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, pp. 822–825, IEEE, 2014. [9] M. Benaissa et al., “Throughput/area-efficient ecc processor using montgomery point multiplication on fpga,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 62, no. 11, pp. 1078–1082, 2015. [10] Z. U. Khan and M. Benaissa, “High-speed and low-latency ecc processor implementation over gf (2 m) on fpga,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 1, pp. 165–176, 2017. [11] D. J. Bernstein, “Explicit-formulas database,” http://www. hyperelliptic. org/EFD, 2007. [12] J. Fan, X. Guo, E. De Mulder, P. Schaumont, B. Preneel, and I. Verbauwhede, “State-of-the-art of secure ecc implementations: a survey on known side-channel attacks and countermeasures,” in Hardware-Oriented Security and Trust (HOST), 2010 IEEE International Symposium on, pp. 76–87, IEEE, 2010. [13] J. López and R. Dahab, “Fast multiplication on elliptic curves over gf (2 m) without precomputation,” in International Workshop on Cryptographic Hardware and Embedded Systems, pp. 316–327, Springer, 1999. [14] Y. K. Lee and I. Verbauwhede, “A compact architecture for montgomery elliptic curve scalar multiplication processor,” in International Workshop on Information Security Applications, pp. 115–127, Springer, 2007. [15] M. Hutter, M. Joye, and Y. Sierra, “Memory-constrained implementations of elliptic curve cryptography in co-z coordinate representation,” in International Conference on Cryptology in Africa, pp. 170–187, Springer, 2011. [16] B.-Y. Peng, Y.-C. Hsu, Y.-J. Chen, D.-C. Chueh, C.-M. Cheng, and B.-Y. Yang, “Multi-core fpga implementation of ecc with homogeneous co-z coordinate representation,” in International Conference on Cryptology and Network Security, pp. 637–647, Springer, 2016. [17] I. Nakata, “On compiling algorithms for arithmetic expressions,” Communications of the ACM, vol. 10, no. 8, pp. 492–494, 1967. [18] R. R. Redziejowski, “On arithmetic expressions and trees,” Communications of the ACM, vol. 12, no. 2, pp. 81–84, 1969. [19] R. Sethi and J. D. Ullman, “The generation of optimal code for arithmetic expressions,” Journal of the ACM (JACM), vol. 17, no. 4, pp. 715–728, 1970. [20] R. Sethi, “Complete register allocation problems,” SIAM journal on Computing, vol. 4, no. 3, pp. 226–248, 1975. [21] R. Govindarajan, H. Yang, J. N. Amaral, C. Zhang, and G. R. Gao, “Minimum register instruction sequencing to reduce register spills in out-of-order issue superscalar architectures,” IEEE Transactions on Computers, vol. 52, no. 1, pp. 4–20, 2003. [22] W.-D. Li, M.-S. Chen, P.-C. Kuo, C.-M. Cheng, and B.-Y. Yang, “Frobenius additive fast fourier transform,” arXiv preprint arXiv:1802.03932, 2018. [23] J. Forrest, “Cbc (coin-or branch and cut) open-source mixed integer programming solver, 2012,” URL https://projects. coin-or. org/Cbc. [24] H. Fan, J. Sun, M. Gu, and K.-Y. Lam, “Overlap-free karatsuba–ofman polynomial multiplication algorithms,” IET Information security, vol. 4, no. 1, pp. 8–14, 2010. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/69114 | - |
| dc.description.abstract | 橢圓曲線密碼是公鑰密碼系統中的一大基石，而美國政府將一系列的曲線制定為標準。針對二元體上最高的安全等級，我們提出了一個最快的橢圓曲線密碼多核心處理器，並實作於現場可程式邏輯閘陣列中。演算法的層面上，我們選擇了最具競爭力的一套運算公式，並設法找出對多核心最佳化的排程；數位電路的層面上，我們基於快速相乘算法設計了一個高吞吐量的乘法器作為運算核心，並比較不同形式乘法器之間的差異；計算機組織的層面上，我們採用了一個簡潔的架構，並將其擴充成多核心的版本。總而言之，我們實作了一個極高速的橢圓曲線密碼處理器，讓運算效能達到更高的境界。 | zh_TW |
| dc.description.abstract | Elliptic Curve Cryptography (ECC) is a popular building block of public key protocols. A set of curves are standardized by the National Institute of Standards and Technology (NIST). Aiming at the highest security level, we propose the fastest multi-core ECC implementation over binary fields on FPGAs. In the aspect of algorithm, we choose the most competitive laddering formula, and seek the optimal instruction sequences according to different number of cores. In the aspect of digital circuits, we design a high-throughput multiplier based on the Karatsuba-Ofman Algorithm (KOA), and make a thorough comparison among different styles of multipliers. In the aspect of computer architecture, we adopt a compact structure, and extend it to a multi-core version. In conclusion, we implement an extremely high-speed ECC processor for NIST curves, pushing the performance to the limits. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-17T03:09:19Z (GMT). No. of bitstreams: 1 ntu-107-R05921056-1.pdf: 2415220 bytes, checksum: 412cdbcbe340e91490545bde5c2c9964 (MD5) Previous issue date: 2018 | en |
| dc.description.tableofcontents | Introduction 1
Preliminaries 3 Parallelization of Laddering Formulas 8 Multiplier over Binary Fields 15 Architecture of the ECC Processor 25 Experimental Results 28 Conclusion 31 References 33 | |
| dc.language.iso | en | |
| dc.subject | 多核心處理器 | zh_TW |
| dc.subject | 橢圓曲線密碼 | zh_TW |
| dc.subject | 快速相乘算法 | zh_TW |
| dc.subject | 現場可程式邏輯閘陣列 | zh_TW |
| dc.subject | Multi-Core Processor | en |
| dc.subject | ECC | en |
| dc.subject | KOA | en |
| dc.subject | FPGA | en |
| dc.title | 二元體上橢圓曲線密碼之多核處理器 | zh_TW |
| dc.title | A Multi-Core ECC Processor over Binary Fields | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 106-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 謝致仁,陳君明,陳君朋,楊柏因,洪維志 | |
| dc.subject.keyword | 橢圓曲線密碼,多核心處理器,快速相乘算法,現場可程式邏輯閘陣列, | zh_TW |
| dc.subject.keyword | ECC,Multi-Core Processor,KOA,FPGA, | en |
| dc.relation.page | 35 | |
| dc.identifier.doi | 10.6342/NTU201800997 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2018-07-23 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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