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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/69004
標題: | 由微波多層電路佈局圖中生成電路圖之錯誤修正與立體圖形使用者介面 Error Correction of Schematic Extraction from Microwave Multilayer Layout and Three-dimensional Graphical User Interface |
作者: | Zhi-Wei Cai 蔡志偉 |
指導教授: | 盧信嘉(Hsin-Chia Lu) |
關鍵字: | 微波被動電路,電路佈局驗證,三維顯示, microwave passive circuit,layout versus schematic,three-dimensional display, |
出版年 : | 2017 |
學位: | 碩士 |
摘要: | 本篇論文針對微波被動多層電路設計了圖形化的驗證工具,因電路設計需求需手繪電路元件,手繪元件無法進行現有的電路佈局驗證(LVS)。先對歷年佈局圖生成電路圖的相關研究進行探討並修正原先的演算法,接著開發圖形化介面工具結合前段佈局圖生成電路圖工作與後段電路網表比對工作,提供被動電路的電路佈局驗證工具並支持三維立體顯示。目的是降低失誤帶來的時間成本。圖形化的工具確實有利於使用者比對電路,但對於含有小數值集總元件或不同習慣的設計,程式依然無法準確判斷。 In this thesis, a graphical verification tool is developed for microwave multilayer passive circuits, which are usually designed by hand, and cannot be verified by the existing layout versus schematic checker. We've surveyed the studies accomplished by our laboratory and revised the previous algorithms. With the existence of the layout to schematic extraction and the circuit netlist mapping program, this thesis is dedicated to the combination of them. This tool also supports three-dimensional display. The purpose is to reduce the time cost of mistakes and help users to verify the circuit. However, for different designers, like their personal habits or a lumped component in small value, the program is still unable to determine the layout to schematic mapping accurately. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/69004 |
DOI: | 10.6342/NTU201703457 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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檔案 | 大小 | 格式 | |
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ntu-106-1.pdf 目前未授權公開取用 | 5.14 MB | Adobe PDF |
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