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  3. 電子工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/68904
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dc.contributor.advisor洪銘輝(Minghwei Hong),郭瑞年(Raynien Kwo)
dc.contributor.authorMin-Hao Chenen
dc.contributor.author陳旻浩zh_TW
dc.date.accessioned2021-06-17T02:41:18Z-
dc.date.available2017-12-31
dc.date.copyright2017-08-24
dc.date.issued2017
dc.date.submitted2017-08-16
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/68904-
dc.description.abstract過去以矽及二氧化矽為材料所製作之互補式金氧半場效電晶體(CMOS)為了提升元件性能而不斷縮小尺寸以符合摩爾定律,然而在邁入10奈米技術結點後其微縮將面臨材料本質特性上的限制及物理極限,使製程微縮效益降低,導致電子元件的效能無法繼續提升。三五族化合物半導體擁有很高的電子遷移率及飽和電子速率,因此成為取代矽的半導體元件材料之一,相對於矽可以有較低的操作電壓,若以此材料應用於反轉式金氧半場效電晶體中,將可達到高效能與低功耗之電子元件。
此實驗中以分子束磊晶成長之高品質砷化銦鎵為通道材料,再以原子層沉積技術成長氧化鋁及氧化釔於未經任何化學處理的砷化銦鎵表面上作為閘極氧化層,成長過程皆在高真空環境下以臨場方式進行,以氧化鋁/氧化釔/砷化銦鎵結構製作金氧半電容元件,由電容-電壓曲線表現出優異的電容特性,於100~1M Hz間,在累積區(accumulation region)有微小的頻率分散(14%)與介面缺陷密度,低頻量測也有明顯的反轉效應,將此電容元件於氮氣下以750 ℃ 快速高溫熱退火後,電性結果呈現此異質結構具有好的高溫熱穩定性,顯示以臨場方式來成長氧化物有非常良好的氧化層/半導體介面。以氧化鋁/氧化釔/砷化銦鎵結構搭配金屬閘極所製作之自我對準反轉n型通道砷化銦鎵金氧半場效電晶體已成功實現,在閘極長度1 μm,閘極寬度 10 μm的元件中展示最大汲極電流1.13 mA/μm,最大轉移電導550 μS/μm,開關電流比 ~10000 之特性。
此優異的元件結果表示元件結構有好的高溫穩定性及介面特性,不僅可以應用於CMOS相容製程中,同時也展現了三五族半導體應用於未來高效能與低功耗的電子元件中具有相當優秀的潛力。
zh_TW
dc.description.abstractGaAs-based III-V compound semiconductors are one of the most promising channel material to extend Moore’s law beyond the limits of Si because of their high electron mobility. Owing to higher electron mobility and higher saturation velocity than Si, lots of efforts have been driven in perfecting the structure of High-κ/Metal-Gate on III-V material to achieve high performance and low power dissipation metal-oxide-semiconductor field-effect-transistors (MOSFETs). Therefore, the interface between III-V semiconductor and high-κ dielectric is the key issue to be solved. A perfected oxide/semiconductor interface with low interfacial trap density (Dit) and high-temperature stability is essential for a III-V MOSFET with high speed of operation and heterogeneous integration of high-κ /InGaAs onto the current integrated circuit using the Si platform.
In this work, high performance of gate-first self-aligned inversion-channel In0.53Ga0.47As MOSFETs using Al2O3/Y2O3 as a gate dielectric and TaN/TiN as gate metal have been fabricated. The growth of III-V epi-layer and high-κ dielectrics were carried out in an ultra-high vacuum (UHV) multi-chamber system consisting of molecular beam epitaxy (MBE) chambers and atomic-layer deposition (ALD) reactors. Dual gate dielectrics of Y2O3 and Al2O3 were directly and in sequence deposited onto freshly MBE grown InGaAs by using in-situ ALD.
The Al2O3/Y2O3/In0.53Ga0.47As MOS capacitors also exhibit well-behaved capacitance-voltage (CV) characteristics with a true inversion behavior, low Dit of 4~5 x 10^12 eV-1cm-2 as well as low leakage current densities of 10^-8 A/cm2 at ±1 MV/cm. Moreover, 1μm-gate-length TaN/TiN/Al2O3/Y2O3/In0.53Ga0.47As MOSFETs have demonstrated high extrinsic maximum drain current (Id,max) of 1.1 mA/μm, a peak transconductance (Gm) of 0.55 mS/μm, Ion/Ioff of 10000, and a sub-threshold swing of 200 mV/decade. This work shows that InGaAs is one of the potential candidates to replace Si, which is promising for application of logic circuit in next generation.
en
dc.description.provenanceMade available in DSpace on 2021-06-17T02:41:18Z (GMT). No. of bitstreams: 1
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Previous issue date: 2017
en
dc.description.tableofcontents致謝.........................................................................................................................................i
中文摘要................................................................................................................................iii
ABSTRACT............................................................................................................................v
CONTENTS..........................................................................................................................vii
LIST OF FIGURES................................................................................................................ix
LIST OF TABLES.................................................................................................................xiii
Chapter 1 Introduction...........................................................................................................1
1.1 Background......................................................................................................................1
1.2 Development of Si CMOS technology and dimension scaling.........................................2
1.3 High carrier mobility of III-V compound semiconductors..................................................3
1.4 High-κ dielectrics on InxGa1-xAs MOS device................................................................5
1.5 Motivation.........................................................................................................................8
Chapter 2 Theory and Instruments.......................................................................................10
2.1 Multi-functional ultra-high vacuum (UHV) system..........................................................10
2.1.1 Molecular beam epitaxy (MBE)..................................................................................11
2.1.2 Atomic layer deposition (ALD)....................................................................................13
2.2 Physical vapor deposition-Sputtering deposition...........................................................15
2.3 Inductively coupled plasma reactive ion etching (ICPRIE)............................................16
2.4 Basic characteristics of Metal-Oxide-Semiconductor Field-Effect-Transistors
(MOSFETs).........................................................................................................................17
2.5 Characterization of oxide/InGaAs..................................................................................23
2.5.1 Electrical measurement of MOS device......................................................................23
2.5.2 Extraction of interfacial trap density............................................................................25
2.5.3 Transmission line method...........................................................................................26
2.5.4 Chemical composition analysis...................................................................................29
Chapter 3 Experimental Procedures....................................................................................30
3.1 Growth of In0.53Ga0.47As epi-layer..............................................................................30
3.2 in-situ atomic layer deposition of high- κ dielectrics.......................................................31
3.3 Post deposition annealing treatments............................................................................32
3.4 Fabrication of In0.53Ga0.47As MOSCAPs and MOSFETs...........................................33
3.4.1 Process for In0.53Ga0.47As MOSCAPs....................................................................33
3.4.2 Process for In0.53Ga0.47As MOSFETs.....................................................................34
Chapter 4 Results and Discussions....................................................................................41
4.1 Characteristics of In0.53Ga0.47As MOSCAPs with ALD high-κ dielectrics
passivation.............................................................................................................................41
4.1.1 ALD-HfO2 on In0.53Ga0.47As for surface passivation...............................................42
4.1.2 High-temperature thermal stability of ALD-Y2O3..........................................................47
4.2 Optimization of dry etching for oxides and metal, high selectivity to gate
metal/high-κ dielectrics.........................................................................................................48
4.3 DC characteristics of self-aligned inversion-channel In0.53Ga0.47As MOSFETs
using in-situ ALD-Al2O3/ALD-Y2O3 as high-κ dielectrics.....................................................51
4.3.1 DC output characteristics: Id-Vd, Id-Vg, and transconductance.................................52
4.3.2 Pd/Ge/Ti/Ni for S/D contact: contact resistivity and sheet resistance.........................55
4.3.3Chemical composition analysis and structure investigation by TEM............................57
4.3.4 Performance benchmark of In0.53Ga0.47As inversion-channel MOSFETs...............60
Chapter 5 Conclusions and Future work...............................................................................61
References............................................................................................................................63
dc.language.isoen
dc.subject氧化釔zh_TW
dc.subject?氧半場效應電晶體zh_TW
dc.subject砷化銦鎵zh_TW
dc.subject?介電常數閘極介電質zh_TW
dc.subject三五族化合物半導體zh_TW
dc.subject原?層沈積zh_TW
dc.subjectMetal-oxide-semiconductor field-effect transistoren
dc.subjectAtomic layer depositionen
dc.subjectIII-V compound semiconductoren
dc.subjectHigh-κ dielectricen
dc.subjectInGaAsen
dc.subjectY2O3en
dc.title臨場方式原子層沉積高介電常數氧化物及金屬閘極之高性能砷化銦鎵自我對準反轉通道金氧半場效應電晶體之研究zh_TW
dc.titleHigh-performance self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors by in-situ atomic-layer-deposited oxide and metal gate stacksen
dc.typeThesis
dc.date.schoolyear105-2
dc.description.degree碩士
dc.contributor.oralexamcommittee陳仕鴻(Shihong Chen)
dc.subject.keyword?氧半場效應電晶體,原?層沈積,三五族化合物半導體,?介電常數閘極介電質,砷化銦鎵,氧化釔,zh_TW
dc.subject.keywordMetal-oxide-semiconductor field-effect transistor,Atomic layer deposition,III-V compound semiconductor,High-κ dielectric,InGaAs,Y2O3,en
dc.relation.page67
dc.identifier.doi10.6342/NTU201703516
dc.rights.note有償授權
dc.date.accepted2017-08-16
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept電子工程學研究所zh_TW
顯示於系所單位:電子工程學研究所

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