利用搜尋空間分割平行測試圖樣產生技術增進橋接故障偵測覆蓋率

Abstract

由於IC的製成尺寸縮小和設計複雜度增加，簡單的錯誤模型(fault model)已經無法達到足夠的缺陷(defect)偵測率。 為了更準確增加偵測到缺陷的機會，本篇論文利用實體設計(physical design)資訊，找出實際可能發生橋接故障(bridging fault)的位置，並針對橋接故障產生偵測圖樣。 本篇論文中提出了一個利用平行化搜尋空間分割(search space partitioning)增進橋接故障偵測機率的測試圖樣產生技術。主要是利用在平行化搜尋空間分割時，加入需要偵測的橋接故障，並在產生的多組測試圖樣中，挑選能提升偵測橋接故障比例最高的測試圖樣。 本論文提出的方法在ISCAS89和ITC99測試電路上進行實驗，實驗結果顯示，與N次測試自動畫圖樣產生流程相比，本論文更能實際提升偵測到橋接故障的機會，不會產生過多的測試圖樣。

Because of the shrinking feature sizes of modern IC’s (Integrated Circuit) and the in-creasing design complexity, single stuck-at fault model is no longer sufficient to achieve the desired defect coverage. To increase the defect coverage, in this thesis, we utilize the physical design in-formation to identify the locations where bridging faults are more likely to occur. Then, test patterns are generated to target these bridging faults. In this thesis, an ATPG (Automatic Test Pattern Generation) that improves bridg-ing fault coverage by parallel search space partitioning is proposed. Once the stuck-at fault test cubes generated by search space partitioning are available, it continues mak-ing input assignments to activate bridging faults. From the generated test cubes, the one that increases the bridging fault coverage the most is selected. The proposed techniques are validated using ISCAS89 (International Symposium on Circuits and Systems) and ITC99 benchmark circuits. The experimental results show that the proposed techniques can achieve better bridging fault coverage and with acceptable test inflation.