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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平(Chung-Ping Chen) | |
dc.contributor.author | Yi-Chuan Lou | en |
dc.contributor.author | 駱億全 | zh_TW |
dc.date.accessioned | 2021-06-17T00:51:33Z | - |
dc.date.available | 2017-01-17 | |
dc.date.copyright | 2012-01-17 | |
dc.date.issued | 2011 | |
dc.date.submitted | 2011-11-11 | |
dc.identifier.citation | [1] J. F. Chen, “Optical proximity correction method for intermediate-pitch features using sub-resolution scattering bars on a mask,” U.S. patent 5,821,014 (1998)
[2] P. Rai Choudhury, Handbook of Micro-lithography, Micro-machining, and Micro-fabrication. SPIE Press, 1997. [3] Burn J. Lin, Micro-lithography Theory and Practice. Lectures in National Taiwan University, 2006. [4] Juan-Antonio Carballo and Sani R. Nassif, “Impact of Design-Manufacturing Interface on SoC Design Methodologies,” in Proc. J. IEEE Design and Test of Computers, p.183-191, June 2004 [5] A. K.Wong, Resolution Enhancement Techniques in Optical Lithography. SPIE Press,2001. [6] Ming-Fong Tsai, Abbe-PCA: Compact Abbe’s Kernel Generation for Micro-lithography Aerial Image Simulation using Principal Components Analysis. Master Thesis,National Taiwan University, 2009. [7] Szu-Kai Lin, An Efficient Contour Generation Algorithm for Micro- lithography Aerial Image. Master Thesis,National Taiwan University, 2009. [8] B. J. Lin. “Phase-shifting masks gain an edge.”Circuits and Devices, 1993. [9] Nicolas B. Cobb, Fast Optical and Process Proximity Correction Algorithms for In-tegrated Circuit Manufacturing, the University of Berkeley, 1998. [10] Tsung-Yu Li, Jason Hsih-Chie Chang, Shin-Pin Hung, and Charlie Chung- Ping Chen,“Provably All-Convex Optimal Minimum-Error Convex Fitting Algorithm Using Linear Programming,” in International Symposium on VLSI Design, Automation and Test, p. T54, Apr. 2010. [11] Chi-Yuan Hung, Qingwei Liu,“Model-based insertion and optimization of assist features with application to contact layers”, Semiconductor manufactur- ing International Crop. Shanghai, China. [12] Meng-Fong Tsai, Shi-Jei Chang, and Charlie Chung-Ping Chen, “Abbe-PCA (Abbe-Hopkins): Micro-lithography Aerial Image Analytical Compact Kernel Generation Based on Principle Component Analysis,” in Proc. SPIE, Vol.7274 Optical Microlithography XXII, p. 2D1-9, Mar. 2009. [13] J. W. Goodman, Introduction to Fourier Optics. McGraw Hill, 1996. [14] Shi-Jei Chang, Charlie Chung-Ping Chen, and Lawrence S. Melvin III, “Abbe-PCASMO: Micro-lithography Simultaneous Source and Mask Optim- ization using Abbe-PCA,” in Proc. SPIE, Vol. 7502 Lithography Asia, p. 86, Nov. 2009. [15] J. F. Chen and J. A. Matthews, “ Mask for Photolithography”, US Patent No. 5,242,770 (1993), MicroUnity. [16] Scott M. Mansfield, Hopewell Junction; Lars W. Liebmann, Poughquag; Shahid Butt, Ossining; Hening Haffner, Fishkill, “ Semiconductor Device Fab- rication using A Photomask with Assist Features”, US Pattent No. 6,421,820 B1(2002) [17] H. H. Hopkins, “The concept of partial coherence in optics,” Proc. Royal Society,vol. A208, 1952. [18] Max Born and Emil Wolf, Principle of Optics. Press Syndicate of The Univ- ersity of Cambridge, 2005 [19] Szu-Kai Lin and Charlie Chung-Ping Chen, “High-speed Micro-lithography AerialImage Contour Generation Without Images,” in Proc. SPIE, Vol. 7274, March 2009. [20] P. Yu, D. Z. Pan, “A Novel Intensity-based Optical Proximity Correction Algorithmwith Speed-up in Lithography Simulation,” in Proc. International Conference on Computer Aided Design, 2007. [21] Jason Hsih-Chie Chang, Charlie Chung-Ping Chen, and Lawrence S. Melvin III,“Abbe-PCA-SMO: Micro-lithography Source and Mask Optimization Based on Abbe-PCA,” in Proc. SPIE, Vol. 7640 Optical Micro-lithography XXIII, Feb. 2010. [22] Alfred Kwok Kit Wong, Optical Imaging in Projection Micro-lithography. SPIE Press, 2005. [23] J. Fung Chen, Tom Laidig, Kurt E. Wampler, and Roger Caldwell “Optical proximity correction for intermediate-pitch features using sub-resolution scatt- ering bars.” MicroUnity Systems Engineering, Inc., Sunnyvale, California 94- 086, Received 28 May 1997; accepted 9 July 1997. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/66691 | - |
dc.description.abstract | 光學微顯影成像技術(Optical micro-lithography image technology)是目前半導體製造中關鍵的一步。隨著超大型積體電路(VLSI, very-large-scale integrated-circuit)製程技術的演進,元件的特徵尺寸(feature size)已小於現今所使用的曝光光源波長,使得成像結果因光的繞射效應明顯地偏離了原本的設計圖樣(design pattern)。因此,各種採用有效技巧與演算法的解析度增強技術(RET, resolution enhancement technology)廣泛地被提出,以期能使成像結果貼近原本的設計圖樣。眾多代表性的技術如偏軸照明(OAI, off-axis illumination)、相移光罩(PSM, phase shift mask)、光學鄰近修正術(OPC, optical proximity correction)等,均有助於成像結果的改善。
於本論文中,我們考慮結合亞解析度輔助圖形(SRAF, sub-resolution assist feature)以及階層式光源光罩最佳化技術(HSMO, hierarchical source mask optimization)。先藉由添加亞解析度輔助圖形的方式來提高設計圖樣的焦深(depth of focus),接著再對於光源以及光罩作最佳化,以期能抵消製程的作用而得到原本的電路設計。 然而,在使用解析度增強技術之前,我們必須先確保我們的光阻內成像模擬的正確性。因此,我們考慮完整介紹建立在平面波分解上的光阻內成像模擬,並且將我們程式的成像模擬結果對照Sentaurus Lithography的成像模擬結果,以方便確認我們程式模擬結果的正確性。 此外,以現在元件數以百萬計的電路設計,若以傳統的直接摺積方式去得到成像結果,這將會需要非常大量的時間以及空間。在此論文中,我們將使用阿貝主成份分析(Abbe-PCA, Abbe principal component analysis)對過程中產生的摺積成像核心(convolution image kernel)進行快速壓縮,並利用摺積查表(convolution lookup table)加速最佳化過程中的目標函數(object cost function)的計算。 於本論文中,我們將使用成像強度誤差(IIE, image intensity error)作為我們的目標函數。經過最佳化以後的模擬結果將會比原始成像模擬結果在目標函數值上改善了67.46%,模擬結果不僅更接近原本設計的圖樣並且在對於失焦(defocus)的容錯率上也提升了。 | zh_TW |
dc.description.abstract | Optical micro-lithography technology simulation is a critical step in semiconductor manufacturing. As the VLSI manufacture technology develops, the feature size of micro-electronic devices shrinks smaller than the wavelength of exposure light source in modern microlithography. Consequently, the image quality and resolution on the wafer are getting worse owing to diffraction effect. Therefore, lots of resolution enhancement technologies (RETs) with remarkable skills and algorithms are so far widely proposed to minimize the difference between design pattern and image result. Conventional RETs such as off-axis illumination (OAI), phase shift mask (PSM), and optical proximity correction (OPC) are in favor of improving the printing quality.
In this thesis, we consider a method which combines sub resolution assist features (SRAF) and hierarchical source mask optimization (HSMO). Firstly, we add sub resolution assist features for improving depth of focus, and then using the hierarchical source mask optimization for finer image quality. However, we must ensure the correctness of our vector resist image simulation before using resolution enhancement technology. Thus, we’ll completely introduce the optical lithography image system, and compare the result of our simulation to the result of Sentaurus Lithography from Synopsys© for accuracy. Besides, there are millions of devices having to deal with in the nowadays state-of-art, it will take lots of time and space to get the final image result. In this work, we utilize the principal component analysis on Abbe’s image formulation (Abbe-PCA) for high speed kernel compaction on the convolution image kernel, and then the convolution lookup table is used in order to accelerate object cost function evaluation, which usually takes a valuable time consuming to get the full image simulation. In this thesis, we use image intensity error as our cost function. The cost function value of optimized simulation result is 67.46% better than original one, and the optimized result is not only more similar to the original design pattern but also providing finer tolerance of defocus. | en |
dc.description.provenance | Made available in DSpace on 2021-06-17T00:51:33Z (GMT). No. of bitstreams: 1 ntu-100-R98943081-1.pdf: 3531176 bytes, checksum: 71175b0b1f7ae856295b1b9d26f81f30 (MD5) Previous issue date: 2011 | en |
dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 2 1.2 Semi-conductor Industry Process Flow 5 1.3 Design for Manufacturability 6 1.4 Optical Lithography 7 1.4.1 The Numerical Aperture and Fourier Optics 7 1.4.2 Photoresist 9 1.5 Resolution Enhancement Technique 12 1.5.1 Off Axial Illumination 13 1.5.2 Phase Shift Mask 13 1.5.3 Optical Proximity Correction 14 1.5.4 Inverse Lithography Technique 16 1.5.5 Source Mask Optimization 16 1.5.6 Sub-resolution Assist Feature 17 1.6 Summary 18 Chapter 2 Imaging Simulation 19 2.1 Constructing Lithography system 19 2.1.1 Image System Overview 20 2.1.2 Modeling the Image System 22 2.2 Coherent Illumination 23 2.2.1 Coherency 23 2.2.2 Coherent Illumination Formulation 25 2.3 Partial Coherent Illumination 27 2.3.1 Abbe’s Image Formulation 28 2.3.2 Hopkins’ Image Formulation 31 2.4 Kernel Compaction 33 2.4.1 Principle Component Analysis (PCA) 34 2.4.2 Abbe-PCA Compaction 35 2.5 Convolution Lookup Table 37 2.5.1 Rectangle-based Lookup Table 38 2.5.2 Build Lookup Table Recursively and Efficiently 39 2.6 Scalar Aerial Lithography Image System 41 2.6.1 Exit Pupil 41 2.6.2 Oblique Factor Modification 43 2.6.3 Aberration 45 2.7 Vector Resist Lithography Image System 47 2.7.1 Vector Analysis 48 2.7.2 Vector Decomposition 54 2.7.3 Wafer Stack Transmission 56 2.7.4 Transmission and Reflection Coefficients 59 2.7.5 Vector Resist Kernel Formulation 63 2.8 Summary 66 Chapter 3 Sub-resolution Assist Feature Combining with Hierarchical Source and Mask Optimization 67 3.1 Sub-resolution Assist Features 68 3.1.1 Selecting the Assist Feature Width and Pitch 69 3.1.2 Sub Resolution Assist Feature Placement 75 3.1.3 The Comparison of Depth of Focus 78 3.2 Source and Mask Optimization 79 3.2.1 Intensity-based Cost function 80 3.2.2 Abbe-PCA Source Optimization 81 3.2.3 Hierarchical Mask Optimization 82 3.3 Summary 85 Chapter 4 Simulation Result 86 4.1 The result of vector resist image simulation 87 4.2 The Comparison of Depth of Focus 96 4.3 Sub Resolution Assist Feature Placement with Hierarchical Source Mask Optimization 98 4.3.1 Process Parameter 98 4.3.2 Target Design Mask Pattern 100 4.3.3 Summary 101 Chapter 5 Conclusion and Feature Work 113 Bibliography 115 | |
dc.language.iso | en | |
dc.title | 微影成像模擬以及次解析輔助特徵結合HSMO的分析 | zh_TW |
dc.title | The Analysis of Microlithography Image Simulation and
Sub Resolution Assist Feature Combining with HSMO | en |
dc.type | Thesis | |
dc.date.schoolyear | 100-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 蔡坤諭(Kuen-Yu Tsai),陳中寬(Chung-Kuan Cheng),王倫(Lon A. Wang) | |
dc.subject.keyword | 光阻內成像模擬,阿貝成像主成份分析法,解析度增強技術,光學鄰近修正術,階層式光源光罩最佳化,亞解析度輔助圖形, | zh_TW |
dc.subject.keyword | Resist image simulation,Abbe-PCA (principal component analysis),RET (resolution enhancement technology),OPC (optical proximity correction),HSMO (hierarchical source mask optimization),SRAF (sub-resolution assist feature), | en |
dc.relation.page | 118 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2011-11-14 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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