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標題: | 具相位切換技術之低功率高效能無線射頻發射機 Design of Low-Power and Energy-Efficient Wireless RF Transmitters Using Phase-switching Technique |
作者: | Li-Guang Chen 陳立廣 |
指導教授: | 林宗賢(Tsung-Hsien Lin) |
關鍵字: | 相位選擇器,半弦波濾波之OQPSK,高斯頻率鍵移, Phase Selector,HS-OQPSK,G/FSK, |
出版年 : | 2011 |
學位: | 碩士 |
摘要: | 在無線傳輸系統中,低功耗以及高效能是主要的設計考量。本論文提出一可達到低功耗及高效能之調變系統。在傳統的以混波器為基底之傳輸器系統中,數位類比轉換器, 濾波器以及混波器會消耗大量的電流,並且會帶來許多類比電路的非理想效應。本調變系統的核心電路為一相位選擇器,用來取代上述電路以達到低功耗的效能,並且基於直接升頻的原理,本系統可達到高傳輸效率的表現。本系統所支援的調變方式為OQPSK以及半弦波濾波之OQPSK,此兩種調變方式因調變訊號相位的連續性的差異,使得其輸出調變頻譜會有不同。量測結果顯示本傳輸系統在-8 dBm的輸出功率下可傳遞22.5 Mb/s的資料量,並且EVM的值小於8%。本傳輸器實現於0.18微米互補式金氧半製程,在1伏特的供應電壓下消耗功耗為2.9毫瓦。
另外一個作品為實現一應用於六百億赫茲之高斯頻率鍵移之基頻調變器,因為輸速率遠超越數位電路的處理速度,本調變器採用類比式的做法來實現。量測結果中,本調變器可支援1-Gb/s的傳輸頻譜。本晶片實現於90奈米製程,於1.2伏特供應電壓下消耗23毫瓦的功率。 在本論文中的兩個傳輸系統都是以相位切換技巧來實現。因其架構簡單且類似於數位操作的特性,在設計上可達到更好的效能。 In wireless communication system low power and high efficiency are the major concern. This thesis proposes a modulation system which can achieve low power and high data rate requirement. For traditional mixer-based transmitter architecture, the DACs, filters, and mixers consume large power under high data rate and induce many non-idealities of analog circuits. The key component of the modulation system is phase selector, which replaces these circuits and achieve low-power performance. Besides, the direct-up conversion structure facilitates the high data rate operation. The supported modulation schemes are OQPSK and OQPSK with half-sine shaping. These modulation schemes are different from phase-continuity, which might influence the output spectrums. The experimental results shows that the phase-selector based transmitter system deliver a 22.5-Mb/s data rate for -8 dBm output power, and the EVM is lower than 8%. Fabricated in 0.18-um CMOS process, the total power consumption of the transmitter is 2.9 mW under 1-V supply. The other work is a G/FSK baseband modulator for 60-GHz band application, which adopts analog topology since the transmission data rate is beyond operating speed of digital circuits. The measured data rate is up to 1 GHz under FSK mode. This chip is fabricated in 90-nm CMOS process and consumes 23 mW under 1.2-V supply. The operating principle of both modulator systems is based on phase-switching technique, which adopts CML topology. Due to its simplicity and semi-digital characteristics, the design burdens are eliminated and achieve better performance. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/66687 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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