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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/65350完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 吳宗霖(Tzong-Lin Wu) | |
| dc.contributor.author | Hao-Hsiang Chuang | en |
| dc.contributor.author | 莊皓翔 | zh_TW |
| dc.date.accessioned | 2021-06-16T23:38:01Z | - |
| dc.date.available | 2014-08-01 | |
| dc.date.copyright | 2012-08-01 | |
| dc.date.issued | 2012 | |
| dc.date.submitted | 2012-07-25 | |
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Wu, “Reduction in reflections and ground bounce for signal line over slotted power plane using differential coupled microstrip lines,” IEEE Trans. Adv. Packag., vol., 32, pp. 581-588, Aug. 2009. [24] J. D. Gavenda, “Measured effectiveness of a toroid choke in reducing common-mode current,” in Proc. IEEE Int. Symp. Electormagn. Compat., May 1989, pp. 208-210. [25] K. Yanagisawa, F. Zhang, T. Sato, K. Yamasawa, and Y. Miura, “A new wideband common-mode noise filter consisting of Mn-Zn ferrite core and copper/polymide tape wound coil,” IEEE Trans. Mang., vol. 41, no. 10, pp. 3571-3573, Oct. 2005. [26] D. Zhang and R. Huang, “Calculation of effective impedance of common-mode choke made of Mn-Zn ferrite,” in Proc. IEEE Int. Symp. Electormagn. Compat., Zurich, Aug. 2006, pp. 391-394. [27] C.-H. Tsai and T.-L. Wu, “A broadband and miniaturized common-node filter for gigahertz differential signals based on negative-permittivity metamaterials,” IEEE Trans. Microw. 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Cheng, “Analysis and optimization of low-power passive equalizers for CPU-memory links,” IEEE Trans. Compon. Packag. Manuf. Technol., vol. 1, no. 9, pp. 1406-1418, Sep. 2011. [37] E. Song, J. Kim, J. Kim, and J. Cho, “A compact, low-cost, and wide-band passive equalizer design using multi-layer PCB parasitics,” in IEEE Syms. Electr. Perform. Electron. Packag. Syst. Conf., Oct. 2010, pp. 165-168, [38] E. Song, J. Cho, J. Kim, Y. Shim, G. Kim, and J. Kim, “Modeling and design optimization of a wideband passive equalizer on PCB based on near-end crosstalk and reflections for high-speed serial data transmission,” IEEE Trans. Electromagn. Compat., vol. 52, no. 2, pp. 410-420, May 2010. [39] Y. Shim, W. Lee, E. Song, J. Cho, and J. Kim, “A compact and wide-band passive equalizer design using a stub with defected ground structure for high speed data transmission,” IEEE Trans. Microw. Theory Tech., vol. 20, no. 5, pp. 256-258, May 2010. [40] S. B. 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Mei, “Full-wave analysis of coplanar waveguide and slotline using the time domain finite-difference method,” IEEE Trans. Microw. Theory Tech., vol. 37, no. 12, pp. 1949-1957, Dec. 1989. [47] HFSS, ver. 13. Ansoft Corporation. [Online]. Available: http://www. ansoft.com. [48] Y. Yoshimura, “A microstrip slot antenna,” IEEE Trans. Microw. Theory Tech., vol. 20, no. 11, pp. 760-762, Nov. 1972. [49] F. C. de Ronde, “A new class of microstrip directional couplers” in Proc. IEEE Int. Symp. Microw., pp. 184-189, May 1970. [50] W.-D. Guo, J.-H. Lin, C.-M. Lin, T.-W. Huang, and R.-B. Wu, “Fast methodology for determining eye- diagram characteristics of lossy transmission line,” IEEE Trans. Adv. Packag., vol. 32, pp. 175-183, Feb. 2009. [51]Y.-S Cheng and R.-B Wu, “Direct eye diagram optimization for arbitrary transmission lines using FIR filter,” IEEE Trans. Compon., Packag. Manuf. Technol., vol. 1, no. 8, Aug. 2011. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/65350 | - |
| dc.description.abstract | 本文針對跨槽信號線引發的電磁相容問題，提出相關的解決方案及模型化方法。本文中提出的等效電路，將物理結構以傳輸線模型作為基礎，與其電氣特性建立良好的連結。基於所提出的模型架構，本文提出三種低成本的解決方案分別解決當高速信號線跨越蝕刻溝槽的參考平面時，所誘發之串音、共模輻射及材料損耗所造成的信號失真等問題。
本文首先探討信號線間透過槽線的耦合，所誘發之串音問題。針對此問題，本文提出了一低成本解決方案，透過開路之微帶線與槽線之並聯銜接，可有效地降低因符際干擾所造成之串音。透過模擬及實驗的結果，本文驗證了針對低及高頻率之傳輸速度的設計方法。 其次，針對高速共模雜訊，因激發開槽線所產生之共模輻射議題，本文提出一種接地式共振腔技術，用以降低高頻的共模幅射及模態轉換。透過巧妙的將開路式的微帶線與槽線以並聯形式相連，所形成之接地式共振腔可有效的控制共模傳輸特性，以避免激發類似天線般的槽線。在一實驗實例中，以此低成本結構在2.29到3.48 GHz頻率範圍內，有效降低遠場輻射的電場大小。同時，此電場抑制的頻寬如同所提出結構的共模傳輸頻寬。 最後，本文提出一新穎架構，除具備差模信號等化器的功能外，亦擁有寬頻的共模雜訊抑制。就目前的文獻探討，可知此架構為首次在學術界中被提出，同時具備上述的兩種功能。透過妥善設計耦合槽線及末端之電阻值，將其與差模信號線在接收端附近以並聯方式銜接，此電阻不但可提供差模信號的等化功能，亦可吸收部分的共模雜訊。差模信號的傳輸品質經一實驗實例的量測驗證，在信號傳輸速度為8 Gbps時，相較於未設計等化器結構的情況，可明顯改善接收之眼圖。 | zh_TW |
| dc.description.abstract | The dissertation provides solutions and modeling methods for electromagnetic compatibility problems caused by slot-crossing signal traces. Based on the transmission line models, equivalent circuit models for the signal traces were created, which transformed physical configurations into electrical behavior. With the help of the constructed models, low-cost solutions have been proposed to solve the unwanted crosstalk, common-mode radiation and lossy material problems when high-speed signals cross slotted reference plane.
In the beginning, the crosstalk between signal traces crossing the same slot is first investigated. By connecting an open-circuited microstrip line in parallel with the slotline between the crossing signal lines, a branched reflector technique is proposed to suppress the crosstalk due to the inter-symbol interference. The design methods both for low- and high-frequency transmission have been proposed and validated by the simulation and experimental results. Second, a grounded resonator technique is designed to reduce common-mode radiation and mode conversion, which are resulted from common-mode noise striding across the slotted plane. By properly linking the open-circuited transmission lines with the slotline, the common-mode transmission can be controlled to prevent excitation of antenna-like slotline. This low-cost solution makes the radiated electric field to be effectively decreased from 2.29 to 3.48 GHz, which is consistent to the designed passband. Finally, a differential-mode equalizer with broadband common-mode suppression is proposed. To the best knowledge of the author, these dual functions are the first time to be integrated in a single structure. Through suitably connecting the coupled slotlines with the differential line structure, the terminated resistors at the end of coupled slotlines provide the equalization and absorption for differential-mode transmission and common-mode noise, respectively. With the experimental validation, the eye-diagram of differential-mode transmission at 8 Gbps has been greatly improved comparing that without the designed configuration. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-16T23:38:01Z (GMT). No. of bitstreams: 1 ntu-101-F96942005-1.pdf: 5778944 bytes, checksum: a4be9aa3f13289463fd1d192a84a6110 (MD5) Previous issue date: 2012 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
致謝 i 中文摘要 iii ABSTRACT v CONTENTS vii LIST OF FIGURES xi LIST OF TABLES xvii ACRONYMS xviii Chapter 1 Introduction 1 1.1 Research Motivation 1 1.2 Literature Review 2 1.3 Contribution 4 1.4 Dissertation Outline 5 Chapter 2 Introduction to Slotline, Coupled Slotline, and Differential Line Structure 9 2.1 Typical Slotline Configuration 9 2.2 Design Considerations of Slotline 12 2.2.1 Closed-Form Expression of Characteristic Impedance and Phase Constant 12 2.2.2 Dispersive Characteristic Impedance and Propagation Constant Extraction 14 2.2.3 End Effect of Soltine 17 2.2.4 Microstrip-to-Slotline Transition 19 2.3 Typical Applications of Slotline 20 2.4 Fundamental Modes of Coupled Slotline Structure 21 2.5 Fundamental Modes of Differential Line Structure 24 Chapter 3 Crosstalk Reduction and Rapid Estimation Method 29 3.1 Equivalent Circuit Model for Slot-Induced Crosstalk 29 3.2 Crosstalk Estimation Considering Inter-Symbol Interference Effect 35 3.2.1 Crosstalk Analysis under Step-Response Analysis 35 3.2.2 Estimation Methodology for Crosstalk Due to Inter-Symbol Interference 36 3.2.3 Low-Frequency and High-Frequency Approximation 40 3.3 Crosstalk Reduction Technique Using Branched Reflector under Low-Transmission-Speed Condition 41 3.3.1 Design Concept 41 3.3.2 Simulation and Measurement Results 47 3.4 Crosstalk Reduction Technique Using Branched Reflector under High-Transmission Speed Condition 49 3.4.1 Design Concept 49 3.4.2 Simulation and Measurement Results 51 3.5 Reduction Validation in Maximum Crosstalk Enhanced by ISI Effect 53 3.5.1 Estimation Results of Maximum Crosstalk 53 3.5.2 Measurement Results of Maximum Crosstalk Enhanced by ISI 55 3.6 Summary 57 Chapter 4 Common-Mode Radiation Suppressing Technique for Slot-Crossing Differential Lines 59 4.1 Electromagnetic Radiation Mechanism of Slot-Crossing Signal Lines 59 4.2 Equivalent Circuit Modeling of Slot-Crossing Differential Lines 64 4.3 Common-Mode Radiation Suppression Technique 70 4.3.1 Proposed Structure and Equivalent Circuit Modeling 70 4.3.2 Design Theory 71 4.3.3 Design Flow and Effective Bandwidth Estimation 74 4.4 Experimental and Numerical Results 76 4.4.1 Transmission of Common- and Differential-mode Signal 76 4.4.2 Suppression of Mode Conversion and Radiated Emission 82 4.5 Summary 86 Chapter 5 A Novel Differential-Mode Passive Equalizer with Wideband Common-Mode Suppression 89 5.1 Proposed Structure and its Equivalent Circuit Model 89 5.1.1 Physical Structure of Proposed Idea 89 5.2 Odd-Mode Equalization 97 5.2.1 Conductor and Dielectric Loss in Odd-Mode Transmission 97 5.2.2 Design Methodology for Odd-Mode Equalization 99 5.2.3 Design Flow for Odd-Mode Equalization 104 5.3 Closed-Form Expression for Even-Mode Filtering Effect 106 5.4 Co-Design Flow for Differential-Mode Equalization and Common-Mode Filtering 108 5.5 Numerical and Experimental Results 111 5.6 Summary 117 Chapter 6 Conclusions and Future Works 119 6.1 Conclusions of the Dissertation 119 6.2 Suggestions for Future Works 120 REFERENCE 121 ACKNOWLEDGMENT 127 PUBLICATION LIST 129 | |
| dc.language.iso | en | |
| dc.subject | 電磁干擾 | zh_TW |
| dc.subject | 等化器 | zh_TW |
| dc.subject | 共模濾波器 | zh_TW |
| dc.subject | 符際干擾 | zh_TW |
| dc.subject | 耦合槽線 | zh_TW |
| dc.subject | 信號完整度 | zh_TW |
| dc.subject | 槽線 | zh_TW |
| dc.subject | 串音 | zh_TW |
| dc.subject | 共模輻射 | zh_TW |
| dc.subject | 損耗 | zh_TW |
| dc.subject | 差模等化 | zh_TW |
| dc.subject | equalizer | en |
| dc.subject | Common-mode filter | en |
| dc.subject | common-mode radiation | en |
| dc.subject | coupled slotline | en |
| dc.subject | crosstalk | en |
| dc.subject | differential-mode equalization | en |
| dc.subject | electromagnetic interference | en |
| dc.subject | inter-symbol interference | en |
| dc.subject | loss | en |
| dc.subject | signal integrity | en |
| dc.subject | slotline | en |
| dc.title | 跨槽信號線中電磁相容問題之模型化分析及電性設計 | zh_TW |
| dc.title | Modeling and Design for Electromagnetic Compatibility Issues of Slot-Crossing Signal Lines | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 100-2 | |
| dc.description.degree | 博士 | |
| dc.contributor.oralexamcommittee | 吳瑞北(Ruey-Beei Wu),楊成發(Chang-Fa Yang),黃天偉(Tian-Wei Huang),黃瑞彬(Ruey-Bing Hwang),洪子聖(Tzyh-Sheng Horng) | |
| dc.subject.keyword | 共模輻射,串音,耦合槽線,差模等化,電磁干擾,等化器,共模濾波器,符際干擾,損耗,信號完整度,槽線, | zh_TW |
| dc.subject.keyword | Common-mode filter,common-mode radiation,coupled slotline,crosstalk,differential-mode equalization,electromagnetic interference,equalizer,inter-symbol interference,loss,signal integrity,slotline, | en |
| dc.relation.page | 134 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2012-07-26 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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