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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林坤佑 | |
dc.contributor.author | Yi-Hsin Chen | en |
dc.contributor.author | 陳繹心 | zh_TW |
dc.date.accessioned | 2021-06-16T17:23:28Z | - |
dc.date.available | 2014-08-19 | |
dc.date.copyright | 2012-08-19 | |
dc.date.issued | 2012 | |
dc.date.submitted | 2012-08-16 | |
dc.identifier.citation | [1] A. Ghazinour, P. Wennekers, J. Schmidt, Y. Vi, R. Reuter, and J. Teplik, “A fully-monolithic SiGe-BiCMOS transceiver chip for 24 GHz applications,” IEEE Bipolar/BiCMOS Circuits and Technology Meeting, pp. 181-184, 2003.
[2] S. Lou and H. C. Luong, “A Linearization Method for RF Receiver Front-End Using Second-Order-Intermodulation Injection,” in IEEE J. Solid-State Circuit, vol. 43, no. 11, Nov. 2008. [3] H. Jeon, K. S. Lee, O. Lee, K. H. An, Y. Yoon, H. Kim, D. H. Lee, J. Lee, C. H. Lee, and J. Laskar, “A 40% PAE Linear CMOS Power Amplifier with Feedback Bias Method for WCDMA Applications,” in Radio Frequency Integrated Circuits Symposium (RFIC), pp. 561-564, 2010. [4] J. Kang, D. Yu, K. Min, and B. Kim, “An ultra-high PAE Doherty amplifier based on 0.13-um CMOS process,” in IEEE Microw. Wireless Compon. Lett., vol. 16, no. 9, pp. 505-507, Sept. 2006. [5] D. G. Kim, N. P. Hong, and Y. W. Choi, “A Novel Linearization Method of CMOSDrive Amplifier Using IMD Canceller,” in IEEE Microw. Wireless Compon. Lett., vol. 10, pp. 671-673, Oct. 2009. [6] Q. Liu, S. Jiangtao, Y. Shu, K. Horie, N. Itoh, and T. Yoshimasu, “A high efficiency and high linearity power amplifier utilizing post-linearization method for 5.8 GHz DSRC applications,” in IEEE Power Amplifiers for Wireless and Radio Applications (PAWR), 2011, pp. 45-48. [7] Jeng-Han Tsai, C. H. Wu, H. Y. Yang, and T. W. Huang, “A 60 GHz CMOS Power Amplifier With Built-in Pre-Distortion Linearizer,” in IEEE Microw. Wireless Compon. Lett., vol. 21, pp. 676-678, Dec. 2011. [8] J. C. Pedro and N. B. Carvalho, Intermodulation Distortion in Microwave and Wireless Circuits. Norwood, MA: Artech House, 2003. [9] “Sonnet User’s Manual, Release 11,” Sonnet Software, Inc., March 2007, Syracuse, NY. [10] K. Choi, M. Kim, H. Kim, S. Jung, J. Cho, S. Yoo, Y. H. Kim, H. Yoo, and Y. Yang, “A highly linear two-stage amplifier integrated circuit using InGaP/GaAs HBT,” in IEEE J. Solid-State Circuit, vol. 45, no. 10, pp. 2038-2043, Oct. 2010. [11] H. Matsubara, K. Ishihara, N. Miyadai, and T. Nojima, “Hybrid predistortion to compensate third- and fifth-order intermodulation of a 2 GHz power amplifier using cuber predistortion and second harmonics injection,” in IET Microwave, Antenna & Propagation, vol. 2, pp. 813-822, December 2008. [12] Fan-Hsiu Huang, Hong-Yeh Chang, and Yi-Jen Chan, “A Linearity Improved GaAs pHEMT Power Amplifier using Common-Gate/Common-Source Circuit Topology,” in IEEE European Microwave Integrated Circuits Conference, September 2009, pp. 28-29. [13] F. H. Huang, H. Y. Chang, and Y. J. Chan, “A Linearity Improved GaAs pHEMT Power Amplifier using Common-Gate/Common-Source Circuit Topology,” in IEEE European Microwave Integrated Circuits Conference, pp. 28-29, Sep. 2009. [14] Jeng-Han Tsai, and T. W. Huang, “A 38–46 GHz MMIC Doherty Power Amplifier Using Post-Distortion Linearization,” in IEEE Microw. Wireless Compon. Lett., vol. 17, no. 5, pp. 388-390, May 2007. [15] Jeng-Han Tsai, Hong-Yeh Chang, P. S. Wu, Y. L. Lee, T. W. Huang, and H. Wang, “Design and analysis of a 44-GHz MMIC low-loss built-in linearizer for high-linearity medium power amplifiers,” in IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2487-2496, June 2006. [16] Fan-Hsiu Huang, Hong-Yeh Chang, and Yi-Jen Chan, “A Linearity Improved GaAs pHEMT Power Amplifier using Common-Gate/Common-Source Circuit Topology,” in IEEE European Microwave Integrated Circuits Conference, September 2009, pp. 28-29. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/63930 | - |
dc.description.abstract | 這篇論文題出一個可以使用在24 GHz的低頻二階項前饋技術,它可以改善互補式金氧半導體功率放大器的線性度。電路的主路徑由疊接組態組成,用來放大功率與提供足夠的增益,而電路的附屬路徑產生與主路徑相同的三階項電流,並利用兩路徑的反相特性消除三階項電流,另外,藉疊接組態電流鏡和直流位準移位器設計二階項電流以產生足夠的三階項電流。文中分析了此電路的操作原理及細節,並與已發表的其他線性化技術做比較。
此電路使用180奈米互補式金氧半導體製作一個操作在24 GHz頻段且具有線性化技術的單級放大器。量測的結果,此電路具有8.5 dB的小訊號增益, 17 dBm的飽和輸出功率以及在1-dB 壓縮點有14.4 dBm的輸出功率和12.3%的功率附加效率。為了驗證此電路的線性功能,量測的三階項訊號在甜蜜點(sweet-spot)改善了超過20 dBc,而在64 QAM數位調變訊號的注入下,此電路的頻譜成長可以改善 8 dB,顯示此功率放大器的線性化效果。 | zh_TW |
dc.description.abstract | In this thesis, a new low-frequency IM2 feed-forward method is proposed to enhance the linearity of the 24 GHz CMOS power amplifier. The power amplifier consists of main and auxiliary paths. The main path consists of cascode topology to provide enough gain and amplify the output power. The auxiliary path consists of two transistors to provide the same IM3 current compared to the main path. The cascode current mirror and DC-level shifter are designed to feed the IM2 current in the auxiliary path. The operation detail of the linearized circuit is investigated, and the comparison of this new method versus other previous reported linearization methods is provided.
A 24 GHz power amplifier with the proposed linearization method is fabricated in 0.18-um CMOS technology. According to the measurement, the proposed PA provides 8.5-dB small signal gain, 14.4-dBm OP1dB and 17-dBm Psat. The peak power-added-efficiency (PAE) and PAE at OP1dB is 15% and 12.3%, respectively. To verify the linearization effect, the measured IM3 signal is reduced more than 20 dBc at sweet-spot. Under the 64-QAM modulation, the ACPR and EVM are improved by 8 dB and 2%, respectively. It can be verified that the linearization effect of this power amplifier. | en |
dc.description.provenance | Made available in DSpace on 2021-06-16T17:23:28Z (GMT). No. of bitstreams: 1 ntu-101-R99942002-1.pdf: 2278443 bytes, checksum: a025468c36182bbbebc3867f30d5b46e (MD5) Previous issue date: 2012 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 ii ABSTRACT iii CONTENTS iv LIST OF FIGURES vii LIST OF TABLES xii Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 2 1.3 Contributions 3 1.4 Thesis Organization 3 Chapter 2 Overview of Power Amplifier 5 2.1 Introduction 5 2.2 Important Parameters 5 2.2.1 Power 6 2.2.2 Efficiency 7 2.2.3 Linearity 8 2.3 Linearization Methods 14 2.3.1 Pre-distortion [7] 14 2.3.2 Feedback [3] 15 2.3.3 Feed-forward [5] 16 2.3.4 IM2 injection [2] 17 2.3.5 Multi-gate [6] 18 Chapter 3 Low Frequency IM2 Feed-forward Method 21 3.1 The Principle of the Cancellation Mechanism 21 3.1.1 Architecture 21 3.1.2 Magnitude Analysis 23 3.1.3 Phase Analysis 26 3.2 Cancellation Mechanism in Circuit Implementation 28 3.2.1 Schematic 29 3.2.2 Detail Circuit Discussion 32 3.2.3 Phase Achievement 54 3.3 Summary 57 Chapter 4 The Design of Linearized 24 GHz Power Amplifier 58 4.1 Introduction 58 4.1.1 Motivation 58 4.1.2 Objective 59 4.1.3 Design Flow 59 4.2 Design Considerations of the Main Path 60 4.2.1 Topology 61 4.2.2 Bias 64 4.2.3 Transistor Size 66 4.2.4 Output Matching 71 4.2.5 Input matching 74 4.2.6 Bypass 76 4.3 IM2 Considerations of the Auxiliary Path 79 4.3.1 Current Mirror 79 4.3.2 DC-level Shifter 89 4.3.3 Inductor Ld,4 97 4.4 Simulation Results 100 4.4.1 S-parameters 101 4.4.2 Power Performance 104 4.4.3 IMD3 and IMD5 105 4.5 Measurement results 107 4.5.1 S-parameter 108 4.5.2 Power performance 111 4.5.3 IMD3 112 4.5.4 ACPR and EVM 116 4.6 Summary 121 Chapter 5 Conclusions 126 REFERENCE 127 | |
dc.language.iso | zh-TW | |
dc.title | 利用低頻二階項前饋方法之24 GHz互補式金氧半導體線性化功率放大器之研製 | zh_TW |
dc.title | Research on 24 GHz CMOS Linearized Power Amplifier Using Low Frequency IM2 Feed-forward Method | en |
dc.type | Thesis | |
dc.date.schoolyear | 100-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 王暉,張鴻埜,蔡政翰,蔡作敏 | |
dc.subject.keyword | 功率放大器,24 GHz,線性化,前饋,甜蜜點(sweet-spot), | zh_TW |
dc.subject.keyword | Power Amplifier,linearization,IMD3,24 GHz,Sweet-spot,Feed-forward,IM2, | en |
dc.relation.page | 129 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2012-08-16 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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