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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6231
標題: | 應用於具備低待機功耗之隔離型切換式電源供應器的回授電路研究 Study of Feedback Circuit for Low-Standby-Power Isolated Switch-Mode Power Supplies |
作者: | Chia-Jung Chang 張家榮 |
指導教授: | 陳秋麟(Chern-Lin Chen) |
關鍵字: | 回授架構,切換式電源供應器,待機功耗,脈波寬度調變器,反相式並 聯穩壓器, Feedback topology,switch-mode power supply,standby power,pulse-width-modulation (PWM) controller,reverse-type shunt regulator, |
出版年 : | 2013 |
學位: | 博士 |
摘要: | 本論文旨在探討具備低待機功耗之隔離型切換式電源供應器的回授電路。傳統的回授電路使用一光耦合器來回授輸出資訊,然而,其雙邊的電流將隨著系統輸出能量的減少而增加,造成系統的損耗增加,而最糟的狀況將發生在輸出無負載之時。這一現象對於追求低待機功耗的系統設計者來說,無疑是一大障礙。
有鑑於此,我們提出一可應用於隔離型切換式電源供應器的回授電路,此電路能在轉換器操作於無載時將光耦合器雙邊之電流降至幾乎為零。在這個所提出的回授架構裡,我們使用了一個新提出的反相式並聯穩壓器來產生用於光耦合機制的誤差訊號,而為了接收此誤差訊號並產生正確的驅動訊號,必須採用一個修改過的脈波寬度調變控制器來搭配。此回授架構的能量損耗分析與頻率補償分析均詳述於本論文中。其與傳統回授架構相較,本論文提出的架構具備有極低待機功耗的特色。此外,轉換器操作於輕載時的效率也可有效提升。 為了建構所提出的回授方案,我們使用世界先進公司0.5-um、5-V/40-V的高壓互補式金屬氧化物半導體製程設計並製作了先前提到的脈波寬度調變器與反相式並聯穩壓器等兩顆積體電路。利用這兩顆積體電路,我們實作了兩個輸出電壓12伏特、最大輸出功率18瓦並分別採用傳統與本文提出之回授架構的返馳式轉換器。實驗結果顯示與採用傳統回授架構的轉換器比較,採用本論文提出之回授方案的返馳式轉換器可以在操作於無載狀況下時減少至少27 mW的功率損耗。不僅如此,在輸入電壓為155.5伏特狀況下,當操作於最大輸出功率10%的輸出能量(1.8瓦輸出能量)下,系統可以提升2.2%的轉換效率;而操作於最大輸出功率5%的輸出能量(0.9瓦輸出能量)下,系統可以提升3.6%的轉換效率。 This dissertation focuses on the feedback circuit for isolated switch-mode power supplies with low-standby power. The conventional feedback network uses an optocoupler to feedback the output information; however, the currents of that optocoupler on its two sides get larger with the decrease of the output power, and the worst case happens when there is no output load applied. This fact leaves an obstacle for system designers to pursue a low standby power. In view of this, a feedback network for isolated switch-mode power supplies that automatically reduces the currents flowing through the optocoupler to nearly zero under the no-load condition is proposed. This feedback network uses a proposed reverse-type shunt regulator to generate an error signal for optical coupling, and a modified pulse-width-modulation (PWM) controller is adopted to receive the feedback signal. The power loss analysis and the frequency compensation method are both presented in this dissertation. In comparison to the conventional topology, this proposed one exhibits much lower standby power loss. Besides, light-load efficiency can be improved as well. For implementing the proposed scheme, the PWM controller and the reverse-type shunt regulator are designed and fabricated in VIS 0.5-um 5-V/40-V high-voltage CMOS technology. Two 12-V/18-W flyback converters adopting respectively the proposed and the conventional feedback topology are then implemented to compare with each other. Experiments reveal that the converter which adopts the proposed feedback technique will save a power of at least 27 mW under the no-load condition. The system efficiency is also improved by 2.2% under the 10%-load (1.8-W output) condition and by 3.6% under the 5%-load (0.9-W output) condition when the input voltage is 155.5 V. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/6231 |
全文授權: | 同意授權(全球公開) |
顯示於系所單位: | 電子工程學研究所 |
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ntu-102-1.pdf | 7.54 MB | Adobe PDF | 檢視/開啟 |
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