一個零點零零四平方毫米單通道六位元每秒十二億五千萬次取樣的延時轉移連續漸近式類比數位轉換器

Abstract

一個以40奈米CMOS製程實現的單通道非同步六位元每秒十二億五千萬次的連續漸近式類比數位轉換器被提出。 此設計採用了延時轉移技術，去幫助比較器跳過亞穩態的時段。它轉移比較器的延遲時間，產生一點五位元的閾值範圍，以加快比較速度，並補償動態偏移。此外，為了最大化一個時鐘周期的使用效率，加入自動取樣電路，以適當地分配取樣相位及轉換相位。 此類比數位轉換器的最高信噪失真比達37.1dB，供應1.2伏特時，功耗為5.3毫瓦，性能係數為73fJ/c.-s。因為不需要額外的校正電路，主電路所占面積只有0.004平方毫米。

A single channel, asynchronous, 6-bit, 1.25GS/s SAR ADC in 40nm CMOS technology is proposed. In this design, the delay-shift technique is applied, which helps the comparator skip the period of metastability. It shifts the comparator delay, generating the 1.5b threshold range to accelerate the comparison speed and compensate the dynamic offset by the redundancy. Besides, so as to maximize the efficiency of the use of a clock period, The Duty-cycle-auto-adjusting (DCAA) circuit is added to assign the proportion of the sampling phase and the conversion phase properly. This ADC achieves 37.1dB peak SNDR, consumes 5.3mW at 1.2V supply, and results in an FoM of 73fJ/c.-s. Because there is no extra circuit for calibration, the core circuit only occupies an area of 0.004mm^2.