請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61097完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李百祺 | |
| dc.contributor.author | Gang-Wei Fan | en |
| dc.contributor.author | 范剛瑋 | zh_TW |
| dc.date.accessioned | 2021-06-16T10:46:17Z | - |
| dc.date.available | 2018-08-27 | |
| dc.date.copyright | 2013-08-27 | |
| dc.date.issued | 2013 | |
| dc.date.submitted | 2013-08-12 | |
| dc.identifier.citation | [1] T. L. Szabo, Diagnostic Ultrasound Imaging: Inside Out, 2004.
[2] J. W. Hunt, M. Arditi, and F. S. Foster, “Ultrasound transducers for pulse-echo medical imaging,” IEEE Trans. Biomed. Eng., vol. BME-30, no. 8, pp. 453-481, Aug. 1983. [3] O, T, Von Ramn and S. W. Smith, “Beam steering with linear arrays,” IEEE Trans. Biomed. Eng., vol. BME-30, no. 8, pp. 438–452, Aug. 1983. [4] K. E. Thomenius, “Evolution of ultrasound beamformers,” in Proc. IEEE Ultrason. Symp., pp. 1615–1622, 1996. [5] J. Nielsen, “Nielsen’s law of internet bandwidth,” Jakob Nielsen’s Alertbox, Apr. 5, 1998. [6] Xilinx. Available: http://www.xilinx.com/ [7] Xilinx, Virtex-6 Family Overview, Jan. 19, 2012. [8] Xilinx, DSP: Designing for Optimal Results, 1.0 ed., 2005. [9] B. E. Priyanto, C. L. Law, and Y. L. Guan, “Design & implementation of all digital I-Q modulator and demodulator for high speed WLAN in FPGA,” in Proc. IEEE PACRIM., vol. 2, pp. 659-662, Aug. 2003. [10] H. Samueli and B. C. Wong, “A VLSI architecture for a high-speed all-digital quadrature modulator and demodulator for digital radio application,” IEEE J. Sel. Areas Commun., vol. 53, no. 8, pp. 1512-1519, Oct. 1990. [11] C. C. Jong, Y. Y. H. Lam, and L. S. Ng, “FPGA implementation of a digital IQ demodulator using VHDL,” in Proc. FPL., pp. 410-417, 1997. [12] D. Bernal, P. Closas, and J.A. Fernandez-Rubio, “Digital I&Q demodulation in array processing: theory and implementation,” in Proc. EUSIPCO., Lausanne, Switzerland, Aug. 25-29, 2008. [13] P. W. Cheng, C. C. Shen, and P. C. Li, “Ultrasound RF channel data compression for implementation of a software-based array imaging system,” in Proc. IEEE Ultrason. Symp., pp. 1423-1426, Oct. 18-21, 2011. [14] P. W. Cheng, C. C. Shen, and P. C. Li, “MPEG compression of ultrasound RF channel data for a real-time software-based imaging system,” IEEE Trans. Ultrason. Ferroelectr. Freq. Control, vol. 59, no. 7, pp. 1413-1420, Jul. 2012. [15] A. W. Wegener, “Lossless and loss-limited compression of sampled data signals,” US patent 5 839 100, Apr. 22, 1996. [16] A. W. Wegener, “Adaptive compression and decompression of bandlimited signals,” US patent 7 009 533, Feb. 13, 2004. [17] U. W. Lok, G. W. Fan, and P. C. Li, “Lossless compression with parallel decoder for improving performance of GPU-based beamformer,” in Proc. IEEE Ultrason. Symp., Jul. 2013, to be published. [18] M. Nentwig, “Weighted least-squares FIR with shared coefficients,” DSPRelated, May. 23, 2012. [19] A. Wegener, “Next-generation ultrasound will rely on real-time compression,” Electron. Design, Feb. 10, 2011. [20] L. Vachhani, K. Shridharan, and P. K. Meher, “Efficient CORDIC algorithms and architectures for low area and high throughput implementation,” IEEE Trans. Circuits and Syst. II, Express Briefs, vol. 56, pp. 61-65, Jan. 2009. [21] L. Vachhani, K. Shridharan, and P. K. Meher, “Efficient FPGA realization of CORDIC with application on robotic exploration,” IEEE Trans. Ind. Electron., vol. 56, pp. 4915-4929, Dec. 2009. [22] W. H. Chen, C. Smith, and S. Fralick, “A fast computational algorithm for the discrete cosine transform,” IEEE Trans. Commun., vol. 25, pp. 1004-1009, Sep. 1977. [23] A. Amira, A. Bouridane, P. Milligan, and M. Roula, “Novel FPGA implementations of Walsh-Hadamard transforms for signal processing,” in Proc. IEE Vision, Image and Signal Processing, vol. 148, no. 6, pp. 377-383, Dec. 2001. [24] P. K. Meher and J. C. Patra, “Fully-pipelined efficient architectures for FPGA realization of discrete Hadamard transform,” in Proc. IEEE Intl. Conf. on Application-Specific Syst., Architecture and Processors, pp. 43–48, Jul. 2008. [25] A. Amira and A. Bouridane, “An FPGA based accelerator for discrete Hartley and fast Hadamard transforms,” Circuits and Syst., 2003 IEEE 46th Midwest Symp., Dec. 30, 2003. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/61097 | - |
| dc.description.abstract | 本研究主旨為在FPGA上實現超音波原始資料的解調及壓縮，利用硬體的計算能力突破傳輸介面的瓶頸，有效降低軟體基礎的超音波影像系統中，即時成像時的高頻寬需求。傳統的超音波影像系統以硬體系統為主，利用其高度平行化架構達成在短時間內處理陣列系統即時成像所需的龐大資料量。然而隨著電腦科技發展，無論是處理器時脈、傳輸介面頻寬、抑或平行運算能力都有長足進步，以軟體系統取代硬體數位電路不再是無稽之談。相較於硬體系統，軟體系統在開發、更新、整合時所需的成本遠低於硬體，並且能以相同的硬體架構達成更多元化的功能。因此，以軟體為基礎的影像系統便成為近年來的發展趨勢。以軟體為基礎的系統縱然有著許多優點，但其所需的大量資料傳輸亦會成為系統即時成像的瓶頸所在。本研究提出以前端硬體電路中原用來控制系統訊號的FPGA為標的，在其上實行超音波原始資料的基頻解調及無失真壓縮，以有效降低所需的資料傳輸量。運用FPGA所具有的可程式化特性及豐富硬體電路資源，以額外增加的運算來換取軟體系統中頻寬需求的降低。在基頻解調的部分，本研究利用對象系統中，取樣頻率為探頭中心頻率四倍的特性，以及Xilinx FPGA上提供的DSP元件進行濾波所需的摺積運算，可減少解調時的資源使用量並同時將架構簡化。解調過程中，原始資料會先轉換為IQ資料使資料量增為兩倍，再經過縮減取樣後變為四分之一，共提供兩倍的壓縮率。在壓縮的部分，本研究提出一可變長度編碼方法進行無失真壓縮，其輸出包含一可變長度之編碼字串及一固定長度之位址資訊。此位址資訊使解碼方能以平行化架構進行解碼，可與後端軟體系統中的平行運算技術，如NVIDIA的CUDA架構相互配合，以提升整體運算效率。本壓縮方法可提供約1.5~1.7倍的壓縮率，與解調結合後可達到整體約3~3.4倍的壓縮效果。在128通道系統、每幅189條波束、每條波束取樣深度2048點的扇形掃描中，若要實現每秒30幅的即時成像，所需的傳輸頻寬為2.77GB/s。以現行PCI-E 2.0介面每個通道500MB/s的最大傳輸率而言，需使用8通道的PCI-E 2.0介面卡(4GB/s)才能負擔。若使用本研究提出的即時壓縮方法，可將頻寬降低3倍以上，使用2通道的PCI-E介面卡(1GB/s)即可負擔傳輸量。 | zh_TW |
| dc.description.abstract | As compared with conventional hardware-based ultrasonic imaging systems, a software-based system provides the advantages of low development cost and system programmability. Therefore, software-based systems have become the trend of ultrasound system development. Despite of the advantages, massive data transmission becomes one of the bottlenecks to perform real-time software based imaging. It is the purpose of this research to develop and implement efficient methods for real-time data compression of ultrasound RF data with a field programmable gate array (FPGA) device. In the proposed methods, the data size is reduced by performing base-band demodulation and lossless compression on the FPGA in front-end systems. In other words, by taking advantages of the computation power in the front-end, the large transmission bandwidth requirement for real-time software-based beam forming can be mitigated. The total compression ratio reaches to about 3.4 without introducing any loss to the data. In a 128-channel array system with 189 beams per frame, 2048 points per beam, the hardware bandwidth for performing real-time imaging requires 2.77GB/s. This requires a PCI-E 2.0 x8 protocol to run at full speed (4GB/s, with 500MB/s per lane). With the proposed method, the bandwidth requirement can be reduced to one-third of the original requirement. Therefore, only a PCI-E 2.0 x2 protocol is required. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-16T10:46:17Z (GMT). No. of bitstreams: 1 ntu-102-R00945005-1.pdf: 3432046 bytes, checksum: 130184311044feeee0dd936f523c4411 (MD5) Previous issue date: 2013 | en |
| dc.description.tableofcontents | 致謝 i
中文摘要 ii ABSTRACT iii 目錄 iv 圖目錄 vii 表目錄 ix Chapter 1 緒論 1 1.1 超音波簡介 1 1.2 傳統超音波成像系統 2 1.2.1 單一探頭系統 2 1.2.2 陣列系統 3 1.2.3 架構 4 1.2.4 限制 5 1.3 軟體基礎超音波系統 7 1.3.1 架構 7 1.3.2 限制 7 1.4 研究動機與目標 8 1.5 論文架構 9 Chapter 2 實驗架構及器材 10 2.1 實驗架構及方法 10 2.2 器材：FPGA 11 2.2.1 FPGA構造 12 2.2.2 FPGA設計流程 15 2.2.3 Xilinx DSP 16 Chapter 3 解調 18 3.1 解調原理 18 3.1.1 背景 18 3.1.2 基頻解調步驟 19 3.2 基頻解調實作 21 3.2.1 解調器實作 21 3.2.2 Down-mixing優化 22 3.2.3 低通濾波優化 24 3.2.4 實現縮減取樣 26 3.3 模擬結果及討論 27 3.3.1 壓縮率 27 3.3.2 資源使用量 27 3.3.3 執行時間 29 Chapter 4 壓縮 30 4.1 壓縮原理 30 4.1.1 無失真壓縮 30 4.1.2 失真壓縮 31 4.1.3 即時壓縮 31 4.2 本研究提出之無失真壓縮方法 32 4.2.1 概念 32 4.2.2 編碼 32 4.2.3 解碼[17] 35 4.3 實作 36 4.3.1 編碼實作 36 4.3.2 解碼實作[17] 37 4.4 模擬結果及討論 38 4.4.1 壓縮率 38 4.4.2 資源使用量 44 4.4.3 執行時間 46 4.4.4 輸出資料權重及錯誤更正 48 Chapter 5 結論與未來展望 49 5.1 結論 49 5.2 未來展望 50 5.2.1 硬體 50 5.2.2 演算法 52 參考資料 56 | |
| dc.language.iso | zh-TW | |
| dc.subject | 陣列超音波系統 | zh_TW |
| dc.subject | FPGA | zh_TW |
| dc.subject | 基頻解調 | zh_TW |
| dc.subject | 可變長度編碼 | zh_TW |
| dc.subject | 無失真壓縮 | zh_TW |
| dc.subject | variable-length coding | en |
| dc.subject | array imaging system | en |
| dc.subject | FPGA | en |
| dc.subject | lossless compression | en |
| dc.subject | base-band demodulation | en |
| dc.title | 以FPGA實現超音波原始資料的解調及無失真壓縮 | zh_TW |
| dc.title | Implementation of Ultrasonic Raw Data Demodulation and Lossless Compression Using FPGA | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 101-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 郭柏齡,沈哲州,鄭耿璽 | |
| dc.subject.keyword | 陣列超音波系統,FPGA,基頻解調,可變長度編碼,無失真壓縮, | zh_TW |
| dc.subject.keyword | array imaging system,FPGA,base-band demodulation,variable-length coding,lossless compression, | en |
| dc.relation.page | 57 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2013-08-12 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 生醫電子與資訊學研究所 | zh_TW |
| 顯示於系所單位： | 生醫電子與資訊學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-102-1.pdf 未授權公開取用 | 3.35 MB | Adobe PDF |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。