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  1. NTU Theses and Dissertations Repository
  2. 工學院
  3. 工程科學及海洋工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/58690
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dc.contributor.advisor李坤彥
dc.contributor.authorYu-Hao Changen
dc.contributor.author張育豪zh_TW
dc.date.accessioned2021-06-16T08:25:54Z-
dc.date.available2017-01-27
dc.date.copyright2014-01-27
dc.date.issued2014
dc.date.submitted2014-01-21
dc.identifier.citation[1] T. Kimoto, 'SiC technologies for future energy electronics,' in VLSI Technology (VLSIT), 2010 Symposium on, 2010, pp. 9-14.
[2] 鄭晃忠、劉傳璽, '新世代積體電路製程技術,' 2011.
[3] H.S.LEE, 'High power bipolar Junction Transistor in Silicon Carbide,' 2005.
[4] C. Locke, 'Growth of 3C-SiC on Si(111) using hot-wall chemical vapor deposition,' University of South Florida, 2009.
[5] C. E. Weitzel, J. W. Palmour, C. H. Carter, Jr., K. Moore, K. J. Nordquist, S. Allen, et al., 'Silicon carbide high-power devices,' Electron Devices, IEEE Transactions on, vol. 43, pp. 1732-1741, 1996.
[6] J. McPherson, J.-Y. Kim, A. Shanware, and H. Mogul, 'Thermochemical description of dielectric breakdown in high dielectric constant materials,' Applied Physics Letters, vol. 82, pp. 2121-2123, 2003.
[7] J. Robertson, 'Band offsets of wide-band-gap oxides and implications for future electronic devices,' Journal of Vacuum Science & Technology B, vol. 18, pp. 1785-1791, 2000.
[8] G. D. Wilk, R. M. Wallace, and J. M. Anthony, 'High-k gate dielectrics: Current status and materials properties considerations,' Journal of Applied Physics, vol. 89, pp. 5243-5275, 2001.
[9] J. Robertson, 'electronic structure and band offsets of high-dielectric-constant gate oxides,' mater. Research Soc, vol. 27, pp. 217-221, 2002.
[10] P. de Rouffignac, J.-S. Park, and R. G. Gordon, 'Atomic Layer Deposition of Y2O3 Thin Films from Yttrium Tris(N,N‘-diisopropylacetamidinate) and Water,' Chemistry of Materials, vol. 17, pp. 4808-4814, 2005.
[11] S. Dhar, L. C. Feldman, S. Wang, T. Isaacs-Smith, and J. R. Williams, 'Interface trap passivation for SiO2/(0001‾) C-terminated 4H-SiC,' Journal of Applied Physics, vol. 98, pp. -, 2005.
[12] S. M. Sze, 'Physics of Semiconductor Devices,' Wiley &Sons Inc., New Caledonia, pp. 197-200, 2007.
[13] 羅正忠、李嘉平、鄭湘原, '半導體工程-先進製程與模擬,' 2011.
[14] K. Fukuda, S. Suzuki, T. Tanaka, and K. Arai, 'Reduction of interface-state density in 4H–SiC n-type metal–oxide–semiconductor structures using high-temperature hydrogen annealing,' Applied Physics Letters, vol. 76, pp. 1585-1587, 2000.
[15] W. A. Hill and C. C. Coleman, 'A single-frequency approximation for interface-state density determination,' Solid-State Electronics, vol. 23, pp. 987-993, 1980.
[16] H. Yano, T. Kimoto, and H. Matsunami, 'Shallow states at SiO2/4H-SiC interface on (112̄0) and (0001) faces,' Applied Physics Letters, vol. 81, pp. 301-303, 2002.
[17] M. Lenzlinger and E. H. Snow, 'Fowler‐Nordheim Tunneling into Thermally Grown SiO2,' Journal of Applied Physics, vol. 40, pp. 278-283, 1969.
[18] M. K. Radhakrishnan, K. L. Pey, C. H. Tung, and W. H. Lin, 'Physical analysis of hard and soft breakdown failures in ultrathin gate oxides,' Microelectronics Reliability, vol. 42, pp. 565-571, 2002.
[19] E. Miranda, E. O’Connor, K. Cherkaoui, S. Monaghan, R. Long, D. O’Connell, et al., 'Electrical characterization of the soft breakdown failure mode in MgO layers,' Applied Physics Letters, vol. 95, 2009.
[20] M. T. B. e. al, 'the high-k solution,' IEEE spectrum, vol. 44, pp. 29-35, 2007.
[21] J. McPherson, J. Kim, A. Shanware, H. Mogul, and J. Rodriguez, 'Proposed universal relationship between dielectric breakdown and dielectric constant,' in Electron Devices Meeting, 2002. IEDM '02. International, 2002, pp. 633-636.
[22] T. Hori, 'Gate Dielectrics and MOS ULSIs Springer-Verlag,' pp. 44-46, 1977.
[23] '氧化釔,' Avaliable: http://zh.wikipedia.org/wiki/%E6%B0%A7%E5%8C%96%E9%92%87.
[24] S. Som, S. K. Sharma, and T. Shripathi, 'Influences of Doping and Annealing on the Structural and Photoluminescence Properties of Y2O3 Nanophosphors,' Journal of Fluorescence, vol. 23, pp. 439-450, 2013.
[25] F. Yan, Z. T. Liu, and W. T. Liu, 'The properties of the Y2O3 films exposed at elevated temperature,' Physica B: Condensed Matter, vol. 406, pp. 2827-2833, 2011.
[26] C. Durand, C. Vallee, V. Loup, O. Salicio, C. Dubourdieu, S. Blonkowski, et al., 'Metal–insulator–metal capacitors using Y2O dielectric grown by pulsed-injection plasma enhanced metalorganic chemical vapor deposition,' Journal of Vacuum Science & Technology A, vol. 22, pp. 655-660, 2004.
[27] Y.-N. Xu, Z.-q. Gu, and W. Y. Ching, 'Electronic, structural, and optical properties of crystalline yttria,' Physical Review B, vol. 56, pp. 14993-15000, 1997.
[28] 林麗娟, 'X光繞射原理及其應用,' 工業材料, vol. 86, 1994.
[29] 'X-Ray Diffraction,' Available: http://highscope.ch.ntu.edu.tw/wordpress/?p=41141.
[30] 'X-Ray Powder Diffraction ' Available: http://pic.sju.edu.tw/project97/background.asp.
[31] D.-G. a. J. Lim, Bum-Sik and Moon,Sang-Il and Jang,Dong-Min and Heo,Jinhee and Yi,Junsin, 'Structural and Electrical Properties of Y2O3 Buffer Layer Prepared by Two Step Process,' MRS Proceedings, vol. 666, 2001.
[32] X. J. Wang, L. D. Zhang, J. P. Zhang, G. He, M. Liu, and L. Q. Zhu, 'Effects of post-deposition annealing on the structure and optical properties of Y2O3 thin films,' Materials Letters, vol. 62, pp. 4235-4237, 2008.
[33] M. R. Jennings, A. Perez-Tomas, M. Davies, D. Walker, L. Zhu, P. Losee, et al., 'Analysis of Al/Ti, Al/Ni multiple and triple layer contacts to p-type 4H-SiC,' Solid-State Electronics, vol. 51, pp. 797-801, 2007.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/58690-
dc.description.abstract本論文所製作的金氧半電容元件是將介電層氧化釔(Y2O3)用射頻濺鍍機沉積在C-Face的4H碳化矽基板,接著使用真空退火做四種不同溫度條件的退火五分鐘,分別是退火溫度300度、400度、500度及600度,最後鍍上鋁金屬當閘極完成元件製作。
實驗部分主要是探討在不同退火溫度下氧化釔對於閘極漏電流和崩潰電場所帶來的影響,藉由電容-電壓量測、電流-電壓量測以及高溫下的量測分析,來算出介面捕捉電荷密度、介電係數值以及平帶電壓的偏移量,從中探討介電層的品質、介電層和基板間的缺陷問題以及介電層內部電荷的關係。
根據X光粉末繞射儀的分析,退火溫度達到400度時,在電流-電壓量測上,能有較低的漏電流。而在高溫量測方面,經過快速熱退火的過程,平帶電壓的偏移有明顯的降低,達到減少氧化層電荷的作用。但在介面缺陷的部分,由於使用真空熱退火,因此在介面缺陷的修復上效果沒有很明顯。介電層強度方面,在無退火的情況下,介電層的強度大概在1.3 MV/cm,隨著退火溫度達到600度時,崩潰電場的強度達到了約3.1 MV/cm,也就是在有退火的情況下,介電層的強度有效的被提升。
zh_TW
dc.description.abstractIn this research, Y2O3 film was deposited on carbon(C)-face 4H-SiC substrates by using a RF sputter. Then Y2O3 films were treated with RTA (rapid thermal annealing) process in vaccum ambient at 300℃, 400℃, 500℃ and 600℃, respectively for five minutes. Finally, we deposited the aluminum as the gate metal
  In the experiment, we investigate the relationship between the effects of post-deposition annealing on the Y2O3 thin film structure and the gate leakage current. By the C-V, and I-V measurement at the high temperature measurement, we calculate the interface trapped density, dielectric constant and the shift of flat-band voltage. Then, we can discuss the insulator quality, interface defects and oxide charge.
  The Y2O3 film shows the lower leakage currents at the annealing temperature of 400℃. Comparing with samples with no RTA process, the anneal samples with the anneal treatment display the lower flat-band voltage shift because the oxide charge in the insulator have been improved. However, the interface traps is not reduced due to the vacuum annealing. The dielectric breakdown field with no annealing process is about 1.3 MV/cm. As the annealing temperature reach to 600℃, the dielectric breakdown field increase to 3.1 MV/cm. The result shows dielectric strength have been improved under the annealing process.
en
dc.description.provenanceMade available in DSpace on 2021-06-16T08:25:54Z (GMT). No. of bitstreams: 1
ntu-103-R00525067-1.pdf: 2266922 bytes, checksum: 0f6b73ba84d702929b0557292c9f5a4f (MD5)
Previous issue date: 2014
en
dc.description.tableofcontents第一章 序論 1
1.1 前言 1
1.2 碳化矽的材料特性 2
1.3 高介電係數介電層 4
1.4 金屬閘極 5
1.5 研究動機 5
1.6 論文架構 6
第二章 理論背景 7
2.1 金氧半電容(MOS-Capacitor) 7
2.1.1 簡介 7
2.1.2 操作理論 8
2.1.3 氧化層缺陷 13
2.1.4 電性量測原理 14
2.2 高介電係數材料 16
2.2.1 簡介 16
2.2.2 高介電係數材料應用 17
2.2.3 閘極氧化層 18
2.2.4 氧化釔材料(Yttrium Oxide、Y2O3) 20
2.3 機台簡介 21
2.3.1 濺鍍機(Sputter) 21
2.3.2 X光粉末繞射儀(X-Ray Powder Diffraction、XRD) 23
2.3.3 快速熱退火系統(Rapid Thermal Annealing System、RTA) 25
2.3.4 薄膜厚度輪廓量測儀(Alpha-Step) 26
第三章 元件製作與分析 27
3.1 元件光罩設計 28
3.2 基板清洗 29
3.3 介電層薄膜沉積 30
3.4 介電層厚度量測 30
3.5 高溫退火 30
3.6 XRD分析 32
3.7 閘極金屬製作 32
3.8 背電極製作 35
3.9 電性量測 36
第四章 實驗結果與討論 38
4.1 厚度量測 38
4.2 XRD量測 41
4.3 電容-電壓量測 42
4.3.1 電容-電壓(C-V)分析 42
4.3.2 介面態電荷密度(Dit)分析 46
4.3.3 變溫量測環境下電容-電壓分析 47
4.3.4 介電係數分析 51
4.4 電流-電壓量測 52
4.4.1 電流-電壓(I-V)分析 52
4.4.2 變溫量測環境下電流-電壓分析 53
第五章 結論及未來展望 56
參考文獻 58
dc.language.isozh-TW
dc.subjectX光粉末繞射儀zh_TW
dc.subject快速熱退火zh_TW
dc.subject氧化釔zh_TW
dc.subject4H碳化矽zh_TW
dc.subject金氧半電容zh_TW
dc.subjectMOS-Capacitoren
dc.subject4H-SiCen
dc.subjectY2O3en
dc.subjectRTAen
dc.subjectXRDen
dc.title氧化釔4H碳化矽金氧半電容在高溫下的特性分析zh_TW
dc.titleAnalysis of 4H-SiC MOS Capacitor under High Temperature Measurement with High-k Gate Dielectrics:Y2O3en
dc.typeThesis
dc.date.schoolyear102-1
dc.description.degree碩士
dc.contributor.oralexamcommittee吳文中,李佳翰
dc.subject.keyword金氧半電容,4H碳化矽,氧化釔,快速熱退火,X光粉末繞射儀,zh_TW
dc.subject.keywordMOS-Capacitor,4H-SiC,Y2O3,RTA,XRD,en
dc.relation.page59
dc.rights.note有償授權
dc.date.accepted2014-01-21
dc.contributor.author-college工學院zh_TW
dc.contributor.author-dept工程科學及海洋工程學研究所zh_TW
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