請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/57600完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 陳德玉 | |
| dc.contributor.author | Ming-Chuan Yen | en |
| dc.contributor.author | 顏銘川 | zh_TW |
| dc.date.accessioned | 2021-06-16T06:53:28Z | - |
| dc.date.available | 2016-07-29 | |
| dc.date.copyright | 2014-07-29 | |
| dc.date.issued | 2014 | |
| dc.date.submitted | 2014-07-21 | |
| dc.identifier.citation | [1] M. Lee, D. Chen, K. Huang, C.-W. Liu, and B. Tai, 'Modeling and design for a
novel adaptive voltage positioning (AVP) Scheme for Multiphase VRMs, ' IEEE Trans. on Power Electronics, vol. 23, pp. 1733-1742, July 2008 [2] M. Lee, D. Chen, K. Huang, E. Tseng, and B. Tai, 'Comparisons of three control schemes for adaptive voltage position (AVP) droop for VRMs applications,' in Proc. IEEE EPE-PEMC, 2006, pp. 206–211. [3] Y.-J. Chen, ' Modeling of constant on-time current-mode control scheme with offset correction and adaptive voltage positioning functions for voltage regulator,' M.S. thesis, National Taiwan University, 2012. [4] C.-W. Chen, 'Tolerance analysis of a constant on-time current-mode voltage regulator with adaptive voltage position feature,' M.S. thesis, National Taiwan University, 2013. [5] G.-Y. Lin, 'The DCM stability issue of voltage regulators using a current-mode constant on-time controller,' M.S. thesis, National Taiwan University, 2013. [6] C.-J. Chen, D. Chen, C.-S. Huang, M. Lee and K.-L. Tseng, 'Modeling and design considerations of a novel high-gain peak current control scheme to achieve adaptive 52 voltage positioning for DC power converters,' IEEE Trans. on Power Electronics, vol. 24, pp. 2942 - 2950, December. 2009. [7] Intel Design Guidelines, 'Voltage regulator module (VRM) and enterprise voltage regulator-down (EVRD) 11.1, ' September, 2009. [8] K. Lee, H. Chou, 'Analysis of the beat frequency oscillation in voltage regulators,' energy conversion congress and exposition (ECCE), September. 2009, pp. 3026-3030. [9] K. Lee, 'Dynamic performance analysis of current sharing control for DC/DC converters, ' Ph. D dissertation, Virginia Tech, 2008. [10] J.-S. Lee, F.-C. Lee, M. Xu, Y. Qiu, 'Modeling and analysis for beat-frequency current sharing issue in multiphase voltage regulators,' IEEE Power Electronics Specialists Conference, June 2007, pp.1542-1548. [11] J. Sun, Y. Qiu, M. Xu, F.-C. Lee, 'High-frequency dynamic current sharing analyses for multiphase buck VRs,' IEEE Trans. on Power Electronics, vol.22, pp.2424-2431, November. 2007 [12] J. Sun, Y. Qiu, M. Xu; F.-C. Lee, 'Dynamic current sharing analyses for multiphase buck VRs,' Applied Power Electronics Conference and Exposition, March 2006, pp. 19-23 53 [13] W. Guo, P.-K. Jain, 'Analysis and modeling of voltage mode controlled phase current balancing technique for multiphase voltage regulator to power high frequency dynamic load,' Applied Power Electronics Conference and Exposition, Feb. 2009, pp.1190-1196. [14] Y. Qiu, M. Xu, J. Sun, F.-C. Lee, 'High-frequency modeling for the nonlinearities in buck converters,' Applied Power Electronics Conference and Exposition, March 2006, pp. 19-23. [15] Y. Qiu, M. Xu, J. Sun, F.-C. Lee, 'A generic high-frequency model for the nonlinearities in buck converters,', IEEE Trans. on Power Electronics, vol.22, pp.1970-1977, September. 2007 [16] R.-B. Ridley, B.-H. Cho, , F.-C. Lee, 'Analysis and interpretation of loop gains of multiloop-controlled switching regulators [power supply circuits],' IEEE Trans. on Power Electronics , pp.489-498, Oct 1988. [17] R.-B. Ridley, 'A new, continuous-time model for current-mode control [power convertors],' IEEE Trans on Power Electronics, vol.6, pp.271-280, April 1991. [18] J. Sun, 'Dynamic performance analyses of current sharing control for DC/DC converters', Ph.D dissertation, Virginia Tech, 2007 54 [19] Y. Qiu, 'High-frequency modeling and analyses for buck and multiphase buck converters,' Ph.D dissertation, Virginia Tech, 2005 [20] M.-T. Tsai, 'Analysis and design of current balancing control in voltage-mode multiphase interleaved voltage regulators,' M.S. thesis, National Taiwan University, 2010. [21] C.-H. Chiu, 'Beat-frequency oscillation in multiphase interleaved voltage regulators with high-gain peak-current control scheme,' M.S. thesis, National Taiwan University, 2010. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/57600 | - |
| dc.description.abstract | 近年來，在用來驅動電腦中央處理器的直流電源轉換器上，有兩種技術的發
展趨勢。其中一種趨勢在於同時推升重載與輕載時的轉換效率。另一個趨勢是使 用交錯式多通道轉換器去達成低電壓大電流的目標。因為這個原因，近年來電流 模式固定導通時間的控制架構已廣泛的被業界所接受。 對中央處理器的電源轉換器應用而言，平均輸出電壓通常需要去提供適應性 電壓的功能。即使在中央處理器的負載電流一直隨時間的變化下，電壓漣波的大 小仍必須要保持在一個在30 毫伏特這個非常嚴謹的範圍內。為了模擬一個頻率變 化會從數千到百萬赫茲的中央處理器的電流，直流轉換器上通常會外加一個具有 大幅度變化的方波負載電流，用來測試輸出電壓漣波的變化。本篇論文的焦點就 是在探討交流性負載效應的電壓漣波的變化。 在本篇論文中，根據工作週期調變頻譜理論的質性分析先被提出，用來瞭解 此問題的全盤複雜性。接著，再藉由使用時域方法的量化分析來探討轉換器輸出 電壓漣波對於轉換器負載電流的變化。這個量化分析方法可用來估測在重複週期 的大幅度階梯負載變動以及不同的抽載頻率下，所造成的輸出電壓漣波之最差情 況。結果也與實驗結果相互驗證。另外，對實際轉換器的各元件的靈敏度分析也 在此提供，用來給一個各個參數的靈敏度變化對於整體漣波大小的想法。雖然分 析得到的結果複雜度很高，但對於設計者而言仍然相當實用。 | zh_TW |
| dc.description.abstract | In recent years, there have been two technical trends for the DC converters for
powering computer central process units (CPUs). One of the trends is to push up conversion efficiency not only for the heavy-load condition but also for the light- load condition. The other trend is to interleave multi-channel converter to achieve high load current at low voltage output. For the reasons, current-mode (C.M) constant on-time (COT) control scheme has been widely adopted by industry in recent year. For CPU power converter applications, the average output voltage is usually required to provide adaptive voltage position (AVP) feature. The ripple voltage magnitude must also be keep within tight range, usually in the range of 30 mV, when the CPU load current is changing with time. To emulate the CPU current, a large square-wave load current ranging from several kilohertz to megahertz is usually imposed on the DC converter and tests the output voltage ripple voltage. The focus of the thesis is to investigate the AC loading effects on output ripple voltage. In this thesis, a qualitative analysis of the issue is first given using duty-cycle VI modulation spectrum theory. This analysis provides insight into the complexity of the issue. Then a quantitative analysis based on a time-domain approach is used to derive converter output voltage ripple in terms of the converter load current excitation. A solution is established for estimating the worst-case output ripple voltage due to repetitive large-step AC load current excitation of wide-range frequencies. The results are verified experimentally. A parametric sensitivity analysis for a practical converter is also provided to give an idea about the sensitivity of each parameter variation on the overall ripple magnitude. The analytical results obtained, although complicated, are useful to the designers. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-16T06:53:28Z (GMT). No. of bitstreams: 1 ntu-103-R01921020-1.pdf: 2609057 bytes, checksum: d2af652dbe557db37f806dfa2da8b12d (MD5) Previous issue date: 2014 | en |
| dc.description.tableofcontents | 口試委員審定書...........................................................................................................II
誌謝 ..............................................................................................................................III 中文摘要..................................................................................................................... IV Abstract........................................................................................................................ V Table of Contents........................................................................................................VII List of Figures.............................................................................................................. IX List of Tables ...............................................................................................................XI Chapter 1 Introduction ............................................................................................... 1 1.1 Background: Voltage Regulator (VRs) .......................................................... 1 1.1.1 Multi-Phase Interleaved DC-DC Converters............................................ 2 1.2 Introduction to a Basic CMCOT Buck Converter .......................................... 3 1.3 CMCOT with an Offset Correcting Circuit (OCCMCOT) ............................ 6 1.4 Motivation ...................................................................................................... 8 1.5 Thesis Organization ...................................................................................... 10 Chapter 2 Differences of Converter AC Loading Effects for Different Control Schemes .................................................................................................... 11 2.1 AC Loading Effect of Constant Frequency Control Schemes ...................... 11 2.2 AC Loading Effects for Constant Frequency Controller for a Constant On Time Controller ............................................................................................ 14 2.2.1 Qualitative Explanation of the Differences from Spectrum Point View 15 2.2.2 Different between Square-Wave Loading and Sinusoidal Loading ....... 21 Chapter 3 AC Loading Effect Analysis of OCCMCOT Buck Converter ............ 23 3.1 Derivation Outline ........................................................................................ 23 3.1.1 Low-Frequency Load Excitation Case Discussion................................. 27 3.1.2 High-Frequency Load Excitation Case Discussion................................ 31 3.1.3 Boundary-Frequency Load Excitation Discussion................................. 36 VIII 3.2 Sensitivity Analysis by Using Time Domain Method Equations ................. 37 Chapter 4 Hardware Verification ............................................................................ 40 4.1 Experimental Circuit .................................................................................... 40 4.1.1 Hardware Verification............................................................................. 40 Chapter 5 Conclusions and Suggested Future Research ....................................... 49 5.1 Conclusions .................................................................................................. 49 5.2 Future Works ................................................................................................ 49 References................................................................................................................... 51 Appendix .................................................................................................................... 55 | |
| dc.language.iso | en | |
| dc.subject | 適應性電壓定位 | zh_TW |
| dc.subject | 輸出電壓漣波 | zh_TW |
| dc.subject | 電壓調節器 | zh_TW |
| dc.subject | 時域方法 | zh_TW |
| dc.subject | 調變頻譜理論 | zh_TW |
| dc.subject | 電流模式 | zh_TW |
| dc.subject | 固定導通時間控制 | zh_TW |
| dc.subject | Modulation spectrum theory | en |
| dc.subject | Adaptive Voltage Position (AVP) | en |
| dc.subject | Constant on-time control | en |
| dc.subject | Current mode control | en |
| dc.subject | Output voltage ripple | en |
| dc.subject | Time domain approach | en |
| dc.subject | Voltage Regulator (VR) | en |
| dc.title | 交流負載對電流模式定導通時間之降壓型穩壓器之輸出電壓漣波分析 | zh_TW |
| dc.title | Analysis of AC Loading Effects on the Output Voltage Ripple of a Current-Mode Constant On-Time Buck Regulator | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 102-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 呂錦山,邱煌仁,陳耀銘 | |
| dc.subject.keyword | 電壓調節器,適應性電壓定位,固定導通時間控制,電流模式,輸出電壓漣波,時域方法,調變頻譜理論, | zh_TW |
| dc.subject.keyword | Voltage Regulator (VR),Adaptive Voltage Position (AVP),Constant on-time control,Current mode control,Output voltage ripple,Time domain approach,Modulation spectrum theory, | en |
| dc.relation.page | 75 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2014-07-21 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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