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| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 李建模(Chien-Mo Li) | |
| dc.contributor.author | Chen-Hung Wu | en |
| dc.contributor.author | 吳辰鋐 | zh_TW |
| dc.date.accessioned | 2021-06-15T16:48:18Z | - |
| dc.date.available | 2020-08-25 | |
| dc.date.copyright | 2020-08-25 | |
| dc.date.issued | 2020 | |
| dc.date.submitted | 2020-08-05 | |
| dc.identifier.citation | [Abraham 19] Héctor Abraham, et al. 'Qiskit: An Open-source Framework for Quantum Computing (2019).' [Arute 19] Frank Arute, et al. 'Quantum supremacy using a programmable superconducting processor.' Nature 574.7779 (2019): 505-510. [Chao 18] Rui Chao, et al., 'Test for a large amount of entanglement, using few measurements,' Quantum 2 (2018): 92. [Chuang 97] Isaac L. Chuang, and Michael A. Nielsen. 'Prescription for experimental determination of the dynamics of a quantum black box,' Journal of Modern Optics 44.11-12 (1997): 2455-2467. [Cohen 13] Jacob Cohen. Statistical power analysis for the behavioral sciences. Academic press, 2013. [Cross 19] Andrew W. Cross, et al. 'Validating quantum computers using randomized model circuits.' Physical Review A 100.3 (2019): 032328. [Grover 96] Lov K. Grover. 'A fast quantum mechanical algorithm for database search.' Proceedings of the twenty-eighth annual ACM symposium on Theory of computing. 1996. [Hayes 04] John P. Hayes, Ilia Polian, and Bernd Becker. 'Testing for missing-gate faults in reversible circuits,' IEEE 13th Asian Test Symposium, 2004. [Hsu 18] Jeremy Hsu, 'CES 2018: Intel’s 49-Qubit Chip Shoots for Quantum Supremacy.' IEEE Spectrum (2018), Jan 09 [IBM Q 20] 5-qubit backend: IBM Q team, 'IBM Q Burlington backend specification V1.1.4, IBM Q Essex backend specification V1.0.1, IBM Q London backend specification V1.1.0, IBM Q Ourense backend specification V1.0.1, IBM Q Vigo backend specification V1.0.2,' (2020). Retrieved from https://quantum-computing.ibm.com [Knight 17] Will Knight, 'IBM Raises the Bar with a 50-Qubit Quantum Computer.' MIT Technology Review (2017), Nov 10 [Knill 05] Emanuel Knill. 'Quantum computing with realistically noisy devices.' Nature 434.7029 (2005): 39. [Knill 08] Emanuel Knill, et al., 'Randomized benchmarking of quantum gates,' Physical Review A 77.1 (2008): 012307. [Magesan 12] Easwar Magesan, Jay M. Gambetta, and Joseph Emerson. 'Characterizing quantum gates via randomized benchmarking.' Physical Review A 85.4 (2012): 042311. [McKague 12] Matthew McKague, Tzyh Haur Yang, and Valerio Scarani, 'Robust self-testing of the singlet,' Journal of Physics A: Mathematical and Theoretical 45.45 (2012): 455304. [Nielsen 02] Michael A. Nielsen, and Isaac Chuang. 'Quantum computation and quantum information.' (2002): 558-559. [O'Rourke 13] Norm O'Rourke, and Larry Hatcher. A step-by-step approach to using SAS for factor analysis and structural Equation modeling. Sas Institute, 2013. [Pearson 00] Karl Pearson. 'X. On the criterion that a given system of deviations from the probable in the case of a correlated system of variables is such that it can be reasonably supposed to have arisen from random sampling.' The London, Edinburgh, and Dublin Philosophical Magazine and Journal of Science 50.302 (1900): 157-175. [Shor 99] Peter W. Shor. 'Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer.' SIAM review 41.2 (1999): 303-332. [Siegel 79] Andrew F. Siegel. 'The noncentral chi-squared distribution with zero degrees of freedom and testing for uniformity.' Biometrika 66.2 (1979): 381-386. [Šupić 16] Ivan Šupić, et al., 'Self-testing protocols based on the chained Bell inequalities,' New Journal of Physics 18.3 (2016): 035013. [Veldhorst 17] M. Veldhorst, et al. 'Silicon CMOS architecture for a spin-based quantum computer.' Nature communications 8.1 (2017): 1766. [Wille 11] Robert Wille, Hongyan Zhang, and Rolf Drechsler, 'ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization,' IEEE Computer Society Annual Symposium on VLSI, 2011. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/53164 | - |
| dc.description.abstract | 現在的研究人員使用隨機基準或量子量在實驗室中測試量子電路，但是這些測試方式很耗時且無法確定錯誤涵蓋率，在這篇論文中我們基於量子閘的功能提出了行為錯誤模型，因為這些錯誤模型的錯誤數量與量子電路的關係式是多項式而不是指數，所以這些錯誤模型是可應用於大型電路的，此外我們提出了一種新穎的量子電路測試生成方式，這種方式使用梯度下降法來產生較短的測試組態，我們還修改了卡方統計方法，以確定在指定的測試遺漏及誤宰下所需要的重複測試次數，在IBM Q系統上的實驗結果證明我們生成的測試組態是有效的，且我們的測試長度比起傳統測試方法短了1000多倍。 | zh_TW |
| dc.description.abstract | Researchers now use randomized benchmarking or quantum volume to test quantum circuits (QC) in the laboratory. However, these tests are long and their fault coverage is unclear. In this thesis, we propose behavior fault models based on the function of quantum gates. These fault models are scalable because the number of faults is polynomial, not exponential, to the size of QC. We propose a novel test generation that uses gradient descent to generate test configuration with short length. We revise the chi-square statistical method to decide the number of test repetitions under the specified test escape and overkill. Experimental results on IBM Q systems show that our generated test configurations are effective, and our test lengths are 1,000X shorter than traditional test methods. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T16:48:18Z (GMT). No. of bitstreams: 1 U0001-0508202012454200.pdf: 3378969 bytes, checksum: 60c3dd8fa221cd5338870585400222b8 (MD5) Previous issue date: 2020 | en |
| dc.description.tableofcontents | 致謝 i 摘要 iv Abstract v Table of contents vi List of Figures viii List of Tables ix Chapter 1 Introduction 1 1.1 Motivation 1 1.1 Proposed Techniques 3 1.2 Contributions 4 1.3 Organization 5 Chapter 2 Background 6 2.1 Quantum Circuit Concepts 6 2.2 Previous QC Testing 8 2.3 Chi-square Test 10 Chapter 3 Testing by RB and QV 11 3.1 Testing by Randomized Benchmarking 12 3.2 Testing by Quantum Volume 14 Chapter 4 Proposed Techniques 15 4.1 qATG Test Generation Flow 15 4.2 Fault Modeling and Fault Injection 16 4.3 Generate Test Configuration 20 4.4 Revised Chi-square Test for QC 25 Chapter 5 Experimental Results 30 5.1 IBM Q and Qiksit Setups 30 5.2 Test Generators Setup 32 5.3 Simulation Results 35 5.4 Testing Real QC 37 Chapter 6 Discussion and Future Work 41 Chapter 7 Conclusion 43 References 44 | |
| dc.language.iso | en | |
| dc.title | qATG:量子電路測試產生技術 | zh_TW |
| dc.title | qATG: Automatic Test Generation for Quantum Circuits | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 108-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 郭斯彥(Sy-Yen Kuo),李峻霣(Jiun-Yun Li) | |
| dc.subject.keyword | 量子電路,測試生成,錯誤模型, | zh_TW |
| dc.subject.keyword | Quantum Circuit,Test Generation,Fault Model, | en |
| dc.relation.page | 46 | |
| dc.identifier.doi | 10.6342/NTU202002450 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2020-08-05 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位： | 電子工程學研究所 | |
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|---|---|---|---|
| U0001-0508202012454200.pdf 目前未授權公開取用 | 3.3 MB | Adobe PDF |
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