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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳中平(Chung-Ping Chen) | |
dc.contributor.author | Yu-Hsuan Pai | en |
dc.contributor.author | 白宇軒 | zh_TW |
dc.date.accessioned | 2021-06-15T13:51:44Z | - |
dc.date.available | 2015-12-01 | |
dc.date.copyright | 2015-12-01 | |
dc.date.issued | 2015 | |
dc.date.submitted | 2015-09-29 | |
dc.identifier.citation | [1] V. Dai, 2008, “Data Compression for Maskless Lithography Systems: Architecture, Algorithms and Implementation,” Ph.D. dissertation, University of California, Dept. Electrical Engineering Computer Science, Berkeley, CA, USA.
[2] Chin-Khai Tang, Ming-Shing Su, and Yi-Chang Lu, “LineDiff Entropy: Lossless Layout Data Compression Scheme for Maskless Lithography Systems,” IEEE Signal Processing Letters, Vol. 20, No. 7, p. 645-648, July 2013. [3] Chris A. Mack, “Lithographic Simulation: A Review,” in Proc. SPIE, vol. 4440 Lithographic and Micro-machining Techniques for Optical Component Fabrication, No. 59, p. 53-72, 2001. [4] M. J.Wieland, H. Derks, H. Gupta, T. van de Peut, F.M. Postma, A. H. V. van Veen, and Y. Zhang, “Throughput enhancement technique for MAPPER maskless lithography,” in Proc. SPIE, vol. 7637, Alternative Lithographic Technologies II, doi:10.1117/12.849447, Apr. 2010. [5] P. Petric, C. Bevis, A. Brodie, A. Carroll, A. Cheung, L. Grella, M. McCord, H. Percy, K. Standiford, and M. Zywno, “REBL nanowriter: Reflective electron beam lithography,” Proc. SPIE, vol. 7271, Alternative Lithographic Technologies, 727107, doi: 10.1117/12.817319, Mar. 2009. [6] Jacob Ziv, Abraham Lempel, 'A Universal Algorithm for Sequential Data Compression'. IEEE Transaction on Information Theory, Vol. IT-23, No. 3, p. 337-343, May 1977. [7] D. Salomon, “A Concise Introduction to Data Compression,” 1st Edition. London, U.K.: Springer-Verlag, 2008, ch. 1, sec. 2. [8] Ming-Shing Sua, Kuen-Yu Tsaia, Yi-Chang Lua, Yu-Hsuan Kuoa, Ting-Hang Peia, Jia-Yush Yenb, “Architecture for next generation massively parallel maskless lithography system (MPML2),” Proc. SPIE, Vol. 7637, Alternative Lithographic Technologies II, 76371Q, doi: 10.1117/12.846444, Apr. 2010. [9] Hsin-I Liu, Vito Dai, Avideh Zakhor, and Borivoje Nikolić, “Reduced Complexity Compression Algorithms for Direct-Write Maskless Lithography Systems,” Proc. SPIE, Vol. 6151, 61512B, doi:10.1117/12.656844, 2006. [10] Chi-Hsiang Yeh, E. A. Varvarigos, B. Parhami, 'Multilayer VLSI Layout for Interconnection Networks', International Conference on Parallel Processing 2000, pp. 33, 2000. [11] Shy-Jay Lin, Tsung-Hsin Yu, Tze-Chiang Huang, T. P. Wang, Wen-Chuan Wang, J. J. Shin, “The REBL DPG: Recent Innovations and Remaining Challenges,” Proc. SPIE, Vol. 9049, Alternative Lithographic Technologies VI, 904917, doi:10.1117/12.2048528, March, 2014. [12] S. M. Rubin, Computer Aids for VLSI Design, 2nd Ed., Addison-Wesley, Boston, Massachusetts, App C (1987). [13] Y.Chen, A.B.Kahng, G. Robins, A.Zelikovsky and Y.Zheng, “Evaluation of the new OASIS format for layout fill compression,” in Proc. of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, Tel-Aviv, Israel, 13–15 Dec. 2004, pp. 377–382 (2004). [14] Jeehong Yang, Serap A. Savari, “Lossless circuit layout image compression algorithm for maskless direct write lithography systems,” in Proc. SPIE. vol.10 043007-1, doi:10.1117/1.3644620, Dec, 2011 [15] Shy-Jay Lin, Pei-Yi Liu, Cheng-Hung Chen, Wen-Chuan Wang, Jaw-Jung Shin, Burn J. Lin, “Influence of Data Volume and EPC on Process Window in Massively Parallel E-Beam Direct Write,” Proc. SPIE, vol. 8680 86801C-1, doi: 10.1117/12.2010865. [16] S.-Y. Lee and B. D. Cook, “PYRAMID-A Hierarchical, Rule-Based Approach Toward Proximity Effect Correction-Part I: Exposure Estimation,” IEEE Transactions on Semiconductor Manufacturing, Vol.11, No. 1, pp. 108-116, 1998. [17] Shy-Jay Lin, Pei-Yi Liu, Cheng-Hung Chen, Wen-Chuan Wang, Jaw-Jung Shin, Burn J. Lin, ” Influence of Data Volume and EPC on Process Window in Massively Parallel E-Beam Direct Write,” Proc. SPIE, vol. 8680, Alternative Lithographic Technologies V, 86801C, doi: 10.1117/12.2010865, March, 2013. [18] ISCAS89 benchmark circuits provided by North Carolina State University https://filebox.ece.vt.edu/~mhsiao/iscas89.html [19] David A. Huffman, “A Method for the Construction of Minimum-Redundancy Codes,” Proceedings of the IRE, Volume 11, Issue 2 , pp 91-99, 1952 [20] Cheng-Chi Wu, Jensen Yang, Wen-Chuan Wang, Shy-Jay Lin, “An Instruction-based High-Throughput Lossless Decompression Algorithm for E-Beam Direct-Write System,” Proc. SPIE, vol. 9423, Alternative Lithographic Technologies VII, 94231P, doi: 10.1117/12.2085278, March, 2015. [21] Die Per Wafer Estimator provided by Silicon Edge http://www.silicon-edge.co.uk/j/index.php/resources/die-per-wafer [22] Shao-Yun Fang, Iou-Jen Liu, and Yao-Wen Chang, “Stitch-Aware Routing for Multiple E-Beam Lithography,” DAC’13, doi: 10.1145/2463209.2488765, 2013. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51823 | - |
dc.description.abstract | 電子束曝光是一種使用電子束在晶圓表面上製造圖樣的方式,是先進光刻(lithography)技術中極具潛力的一種技術,電子束曝光的精度可以達到次奈米(Sub-nm)級,電子束曝光如果能夠達到和光罩曝光技術能夠競爭的產率,則電子束曝光技術成為新一代主流的顯影技術將指日可待。
超大型積體電路中的電晶體數量及設計複雜度,根據摩爾定律呈指數成長,在生產產品時,將設計好的超大型積體電路資訊傳輸至電子束曝光機臺,交由機臺來進行曝光和生產,所需要的資料傳輸規格也越來越高,甚至是目前的傳輸技術無法達到的量級。 在這篇論文中,我們根據科磊公司(KLA-Tencor Corporation)設計的反射式電子束微影顯像系統(Reflective Electron-beam Lithography System)中使用的5位元灰階點陣圖規格,提出一個有效率運用記憶體的方式,將電路布局轉換成5位元灰階點陣圖;最重要的,運用辭典編碼的概念,改良目前已知灰階點陣圖的壓縮演算法,主要針對兩個目前技術上的瓶頸,第一是資料量的壓縮比,第二是解壓縮的速率,讓我們可以將資料經過壓縮後較容易傳輸至電子束曝光的機臺,並且透過簡易的解壓縮方式取得原本所需的資料,解決目前電子束曝光的困境。 實驗數據顯示出我們提出演算法在主要的兩大重要指標,資料量的壓縮比和解壓縮的速率,相較於2013年國立臺灣大學所發表的LineDiff Entropy演算法,分別提升了10%的壓縮比和7.5倍的解壓縮速率。 | zh_TW |
dc.description.abstract | Recently, electron-beam lithography is one of the candidates to draw custom shapes on the surface of wafer. The primary advantage of electron-beam lithography is that it can draw custom patterns with sub-nm resolution. Once the throughput of electron-beam lithography can be competitive with traditional optical lithography, the electron-beam lithography will be the main stream of the lithography.
As the VLSI circuit design getting larger and more complicated. If we want to apply the electron-beam lithography technology for a layout with 26 mm × 33 mm after rasterization with 7-nm pixel size, either we have to compress the bitmap of layout data with compression factor of 329.7 before fabrication and decompress the data inside electron-beam emitters or we need a transmission fiber with transfer bandwidth 105.5 Tbps at least in semi-conductor fabrication. In this thesis, we proposed a more efficient memory-used algorithm to transform the layout data into a 5-bit gray-level bitmap, which is due to the specification of Reflective Electron Beam Lithography (REBL) system proposed by KLA-Tencor Corporation, and also a dictionary-based algorithm to compress the 5-bit gray-level bitmap. We focus on two of the bottlenecks of the electron-beam lithography. First one is the compression ratio and the other one is decompression rate. According to the experimental results, our algorithm has achieved an at least overall 10% higher compression factor and at least 7.5x faster decompression rate in comparison with the LineDiff Entropy published in 2013. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T13:51:44Z (GMT). No. of bitstreams: 1 ntu-104-R02943149-1.pdf: 2647052 bytes, checksum: 3ea59eda03e8b1373958b22503574f4e (MD5) Previous issue date: 2015 | en |
dc.description.tableofcontents | 口試委員審定書 i
誌謝 ii 中文摘要 iii ABSTRACT iv CONTENTS v LIST OF FIGURES vii LIST OF TABLES ix Chapter 1 Introduction 1 1.1 Lithography 2 1.2 Contributions 3 1.3 Organization 4 Chapter 2 Preliminaries 5 2.1 Maskless Lithography 5 2.1.1 Electron-beam Lithography 6 2.1.2 Reflective Electron Beam Lithography 7 2.2 Maskless Lithography System Architecture 13 2.3 Compression Algorithms 15 2.3.1 Lempel-Ziv 15 2.3.2 Block Context Copy Combinatorial Coding (BC4) 18 2.3.3 LineDiff Entropy 20 2.4 Huffman Coding 24 Chapter 3 Lossless Compression Algorithm for Electron-beam Data 26 3.1 Layout Data Transformation 26 3.2 Compression of 5-bit Gray-level Bitmaps 30 3.2.1 Copy-line 31 3.2.2 2-tail 32 3.2.3 Omit Offset 35 3.2.4 Orientation 36 3.3 Huffman-like Coding 39 3.4 Decompression of 5-bit Gray-level Bitmaps 44 Chapter 4 Experimental Results 46 4.1 Results of Compression 50 4.2 Results of Decompression 56 Chapter 5 Conclusion and Future Work 59 REFERENCE 61 | |
dc.language.iso | en | |
dc.title | 無損壓縮演算法應用於多電子束直寫系統 | zh_TW |
dc.title | Lossless Compression Algorithm for Multiple E-Beam Direct Write Systems | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 方劭云(Shao-Yun Fang),陳少傑(Sao-Jie Chen),盧奕璋(Yi-Chang Lu) | |
dc.subject.keyword | 電子束,曝光壓縮,壓縮比,解壓縮,灰階點陣圖,辭典編碼, | zh_TW |
dc.subject.keyword | electron-beam,lithography,compression,compression ratio,decompression,5-bit gray-level,dictionary-based, | en |
dc.relation.page | 63 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2015-09-30 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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