請用此 Handle URI 來引用此文件:
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51446完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 江介宏(Jie-Hong Roland Jiang) | |
| dc.contributor.author | Tzu-Chien Hsu | en |
| dc.contributor.author | 徐子騫 | zh_TW |
| dc.date.accessioned | 2021-06-15T13:34:31Z | - |
| dc.date.available | 2016-02-15 | |
| dc.date.copyright | 2016-02-15 | |
| dc.date.issued | 2016 | |
| dc.date.submitted | 2016-01-30 | |
| dc.identifier.citation | [1] M. Benedetti. Evaluating QBFs via Symbolic Skolemization. In Proc. Int'l Conf. on Logic for Programming, Artificial Intelligence and Reasoning (LPAR), 2004.
[2] A. Biere, F. Lonsing, M. Seidl. Blocked Clause Elimination for QBF. In Proc. Int'l Conf. on Automated Deduction (CADE), pp. 101-115, 2011. [3] V. Balabanov and J.-H. R. Jiang. Unified QBF Certification and its Applications. Formal Methods in System Design, 41(1), pp. 45-65, 2012. [4] M. Cadoli, M. Schaerf, A. Giovanardi, M. Giovanardi. An Algorithm to Evaluate Quantified Boolean Formulae and Its Experimental Evaluation. Journal of Automated Reasoning, 28(2), pp. 101-142, 2002. [5] N. Dershowitz, Z. Hanna and J. Katz. Bounded Model Checking with QBF. In Proc. Int'l Conf. on Theory and Applications of Satisfiability Testing (SAT), 2005. [6] A. Goultiaeva and F. Bacchus. Exploiting QBF duality on a circuit representation. In Proc. Int'l Conf. on Artificial Intelligence (AAAI), 2010. [7] A. Goultiaeva and F. Bacchus. Recovering and Utilizing Partial Duality in QBF. In Proc. Int'l Conf. on Theory and Applications of Satisfiability Testing (SAT), pp. 83-99, 2013. [8] E. Giunchiglia, M. Narizzano, and A. Tacchella. Clause-Term Resolution and Learning in Quantified Boolean Logic Satisfiability. Artificial Intelligence Re- search, 26, pp. 371-416, 2006. [9] M. Janota, W. Klieber , J. Marques-Silva, and E. Clarke. Solving QBF with Counterexample Guided Refinement. In Proc. Int'l Conf. on Theory and Applications of Satisfiability Testing (SAT), pp. 114-128, 2012. [10] J.-H. R. Jiang, H.-P. Lin, and W.-L. Hung. Interpolating Functions from Large Boolean Relations. In Proc. Int'l Conf. on Computer-Aided Design (ICCAD), pp. 779-784, 2009. [11] H. Kleine-Büning, M. Karpinski and A. Flögel. Resolution for Quantified Boolean Formulas. Information and Computation, 117(1), pp. 12-18, 1995. [12] W. Klieber, S. Sapra, S. Gao, E. Clarke. A non-prenex, non-clausal QBF solver with game-state learning. In Strichman, O., Szeider, S. (eds.) SAT, pp. 128-142, 2010. [13] F. Lonsing and A. Biere. DepQBF: A Dependency Aware QBF Solver (system description). Journal on Satisfiability, Boolean Modeling and Computation, 7, pp. 71-76, 2010. [14] J. P. Marques Silva, I. Lynce, and S. Malik. Conflict-Driven Clause Learning SAT Solvers. In Handbook of Satisfiability, pp. 131-153, 2009. [15] H. Samulowitz, F. Bacchus. Using SAT in QBF. In van Beek, P. (ed.) CP , pp. 578-592, 2005. [16] QBF Gallery, 2014. http://qbf.satisfiability.org/gallery/ [17] J. Rintanen. Asymptotically Optimal Encodings of Conformant Planning in QBF. In National Conference on Arti cial Intelligence (AAAI), pp. 1045-1050, 2007. [18] The Quantified Boolean Formulas Satisfiability Library. http://www.qbflib.org/ [19] G. Tseitin. On the Complexity of Derivation in Propositional Calculus. Studies in Constructive Mathematics and Mathematical Logic, pp. 466-483, 1970. [20] K.-H. Tu, T.-C. Hsu, and J.-H. R. Jiang. QELL: QBF reasoning with extended clause learning and levelized SAT solving. In Proc. Int'l Conf. on Theory and Applications of Satisfiability Testing (SAT), pp. 343-359, 2015. [21] L. Zhang. Solving QBF by combining conjunctive and disjunctive normal forms. In Proc. National Conference on Artificial Intelligence (AAAI), pp. 143-150, 2006. [22] L. Zhang and S. Malik. Conflict Driven Learning in a Quantified Boolean Satisfiability Solver. In Proc. Int'l Conf. on Computer-Aided Design (ICCAD), pp. 442-449, 2002. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51446 | - |
| dc.description.abstract | 量詞布林可滿足性(QSAT)具有強大的編碼能力,計算理論中所有的PSPACE-Complete問題可自然且簡潔地編碼為量詞布林可滿足性問題。因此,量詞布林可滿足性問題持續吸引更多研究的關注,且近期也發展出許多高效的量詞布林(QBF)求解器,然而這些求解器仍不成熟,對於業界應用仍需要進一步的突破。
於量詞布林求解器中有兩個主要學習程序,包含有解學習(solution learning)與無解學習(conflict learning)。對於使用合取範式(conjunctive normal form)的量詞布林求解器,其中一主要的研究專注於縮小有解學習與無解學習之間對偶程度的差距(duality gap),而此對偶程度的差距是源於無起始詞語資料(initial cube database)。 近期的研究顯示電路資訊可作為起始詞語資料以縮小對偶程度的差距,此技巧也被實作於兩個最前端的量詞布林求解器中,包含OOQ 與QELL 。OOQ 是第一個提出何謂可作為起始詞語資料的電路資訊,以及如何在使用歸結式(resolution-based)求解器中的有解學習使用電路資訊。另一方面,QELL 則提出了更普遍的可使用電路資訊的描述,且整合電路資訊於展開式(expansion-based)求解器的有解學習中。兩個求解器都展示電路資訊如何幫助加速求解效率。 然而,對於電路資訊的重建與使用仍有三個缺陷: 第一,可重建的電路資訊仍受限。 第二,僅電路資訊可被使用為起始詞語資料。 第三,電路資訊並無完整的使用於QELL 的有解學習中。 此論文對於此三個缺陷提出以下改進方法。 此論文提出如何重建出Tseitin轉換型式以外更多隱藏的電路資訊,以及提出用非電路資訊重建起始詞語資料,並提出對QELL 的有解學習中使用電路資訊的修改方法。新提出重建與使用電路資訊的方法實作於QELL 求解器中,且有提出例子證明此論文的貢獻。 | zh_TW |
| dc.description.abstract | Quantified Boolean Satisfiability (QSAT) is a powerful representation since any problem in PSPACE can be encoded naturally and compactly as QSAT. Due to its representational power, QSAT is gaining increasing research attention, and many effective quantified Boolean formula(QBF) solvers have been developed recently, yet these solvers remain premature and awaits further breakthroughs for industrial applications. There are two main procedures used for QBF solver, including solution learning and conflict learning. One of the main researches about conjunctive normal form based (CNF-based) solver focuses on how to bridge the duality gap between solution learning and conflict learning, while the duality gap results from the empty initial cube database.
Recent research shows that circuit information can be used as initial cube database to bridge the gap, and such technique is implemented in two state-of-the-art QBF solvers, including OOQ and QELL. OOQ is the first QBF solver to propose the definition of usable circuit information for initial cube database, and how to utilize circuit information during solution learning in resolution-based solving style. On the other hand, QELL provides a more general characterization about usable circuit information and integrate circuit information with solution learning in an expansion-based solving style. Both solvers show how circuit information helps achieve exponential speed-up. However, the circuit information reconstruction and utilization are still incomplete in three aspects: First, the reconstructible circuit information is still restricted. Second, only circuit information can be used as initial cube database. Third, circuit information is not fully utilized in the solution learning of QELL. This thesis proposes improvement methods for these three aspects. This thesis shows how to recover more hidden circuit information in addition to Tseitin transformation pattern, and proposes a method to recover initial cubes uncovered by circuit information. This thesis also gives a modified solution learning method to utilize circuit information for QELL. The new proposed methods for reconstructing and utilizing circuit information are implemented in QELL solver, and instances are provided to evidence the contribution of this thesis. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T13:34:31Z (GMT). No. of bitstreams: 1 ntu-105-R02943082-1.pdf: 1120052 bytes, checksum: f84e885f0c037a2ebac5c9ca3a2cfee2 (MD5) Previous issue date: 2016 | en |
| dc.description.tableofcontents | Contents
Abstract iv List of Figures ix List of Tables x 1 Introduction 1 1.1 Our Contributions 3 1.2 Thesis Organization 3 2 Background 5 2.1 Quantified Boolean Formulas 5 2.2 QBF Solver Architecture 9 2.3 QELL: Solution Learning by Levelized Blocking 13 3 Preprocessing: Identification of Circuit Information and Cube Solver Initialization 16 4 Gate Recognition 21 4.1 Tseitin Transformation 23 4.2 Conditional Equivalence relation 23 4.3 Implication 25 5 Circuit Reconstruction 27 5.1 Initialize Cube Solver 30 5.2 Additional Recovered Duality from Non-Circuit Clauses 32 6 QBF Solution learning with Circuit Information 35 6.1 QELL: Static Defined Level Method 35 6.2 Dynamic Defined Level Method 39 7 Implementation Detail 48 7.1 Gate Recognition: Tseitin Transformation 48 7.2 Gate Recognition: Conditional Equivalence Relation and Implication Patterns 50 7.3 Circuit Reconstruction: Detect Feedback Vertex Set 50 8 Experimental Result 52 8.1 Benchmarks from QBF competitions 53 8.2 Solution Learning with Circuit 55 8.3 Comparison between different methods 57 8.4 Dynamic Defined Level Method 60 9 Conclusion and Future Work 62 9.1 Summary 62 9.2 Future Work 64 10 Bibliography 65 | |
| dc.language.iso | en | |
| dc.subject | 使用電路於階層化有解學習 | zh_TW |
| dc.subject | 使用電路於階層化有解學習 | zh_TW |
| dc.subject | 起始詞語資料重建 | zh_TW |
| dc.subject | 電路重建 | zh_TW |
| dc.subject | 階層化有解學習 | zh_TW |
| dc.subject | 量詞布林可滿足性 | zh_TW |
| dc.subject | 量詞布林可滿足性 | zh_TW |
| dc.subject | 階層化有解學習 | zh_TW |
| dc.subject | 電路重建 | zh_TW |
| dc.subject | 起始詞語資料重建 | zh_TW |
| dc.subject | QBF solving | en |
| dc.subject | levelized solution learning with circuit | en |
| dc.subject | initial cube recovery | en |
| dc.subject | circuit reconstruction | en |
| dc.subject | levelized solution learning | en |
| dc.subject | QBF solving | en |
| dc.subject | levelized solution learning with circuit | en |
| dc.subject | initial cube recovery | en |
| dc.subject | circuit reconstruction | en |
| dc.subject | levelized solution learning | en |
| dc.title | 電路資訊於量詞布林函數求解中的重建與使用 | zh_TW |
| dc.title | Reconstructing and Utilizing Circuit Information in Quantified Boolean Formula Solving | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 104-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 王凡(Farn Wang),陳郁方(Yu-Fang Chen) | |
| dc.subject.keyword | 量詞布林可滿足性,階層化有解學習,電路重建,起始詞語資料重建,使用電路於階層化有解學習, | zh_TW |
| dc.subject.keyword | QBF solving,levelized solution learning,circuit reconstruction,initial cube recovery,levelized solution learning with circuit, | en |
| dc.relation.page | 68 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2016-02-01 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
| 顯示於系所單位: | 電子工程學研究所 | |
文件中的檔案:
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-105-1.pdf 未授權公開取用 | 1.09 MB | Adobe PDF |
系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。
