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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林坤佑(Kun-You Lin) | |
dc.contributor.author | Ying-Chia Chen | en |
dc.contributor.author | 陳瑩嘉 | zh_TW |
dc.date.accessioned | 2021-06-15T13:32:29Z | - |
dc.date.available | 2018-03-08 | |
dc.date.copyright | 2016-03-08 | |
dc.date.issued | 2015 | |
dc.date.submitted | 2016-02-02 | |
dc.identifier.citation | [1]“Revision of Part 15 of the Commission’s Rules Regarding Ultra-wideband Transmission Systems,” FCC, Washington, DC, ET Docket 98-153, Feb 14, 2002.
[2]“Federal spectrum use summary 30 MHz - 3000 GHz,” FCC, National Telecommunications and Information Administration Office of Spectrum Management, June 21, 2010. [3] A. Komijani, A. Natarajan, and A. Hajimiri, “A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18-μm CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1901-1908, Sep. 2005. [4] J.-L. Kuo, Z.-M. Tsai, and H. Wang, “A 19.1-dBm fully-integrated 24 GHz power amplifier using 0.18-μm CMOS technology,” in European Microwave Conf., Oct. 2008, pp. 1425-1428. [5]J.-W. Lee and S.-M. Heo, “A 27 GHz, 14 dBm CMOS power amplifier using 0.18-μm common-source MOSFETs,” IEEE Microwave and Wireless Components Letters, vol. 18, pp. 755-757, Nov. 2008. [6] Y.-N. Jen, J.-H. Tsai, C.-T. Peng, and T.-W. Huang, “A 20 to 24 GHz +16.8 dBm fully integrated power amplifier using 0.18-μm CMOS process,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 1, pp.42-44, Jan. 2009. [7] P.-C. Huang, J.-L. Kuo, Z.-M. Tsai, K.-Y. Lin, and H. Wang, “A 22-dBm 24-GHz power amplifier using 0.18-μm CMOS technology,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., May 2010, pp.248–251. [8] C.-C. Hung, J.-L. Kuo, K.-Y. Lin, and H. Wang, “A 22.5-dB gain, 20.1-dBm output power K-band power amplifier in 0.18-μm CMOS process,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. Dig., May 2010, pp. 557–560. [9]N.-C. Kuo, J.-C. Kao, C.-C. Kuo, and H. Wang, “K-band CMOS power amplifier with adaptive bias for enhancement in back-off efficiency,” in Proc. IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2011, pp. 1–4. [10] Y.-C. Hsu, Y.-S. Chen, T.-C. Tsai, and K.-Y. Lin, “A K-band CMOS cascade power amplifier using optimal bias selection methodology,” in Proc. Asia-Pacific Microw. Conf., Dec. 2011, pp. 793–796. [11] K.-Y. Kao, Y.-C. Hsu, K.-W. Chen and K.-Y. Lin, “Phase-Delay cold-FET pre-Distortion linearizer for millimeter-wave CMOS power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 61, no. 12, Dec. 2013. [12] C. Y. Hang, W. R. Deal, Q. Yongxi, and T. Itoh, “High-efficiency push-pull power amplifier integrated with quasi-Yagi antenna,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 6, pp. 1155–1161, Jun. 2001. [13] Y. Qin, S. Gao, and A. Sambell, “Broadband high-efficiency circularly polarized active antenna and array for RF front-end application,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 7, pp. 2910–2917, Jul. 2006. [14]H. Kim and Y. J. Yoon, “Wideband design of the fully integrated transmitter front-end with high power added efficiency,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 5, pp. 916–924, May 2007. [15] C. H. Tsai, Y. A. Yang, S. J. Chung, and K. Chang, “A novel amplifying antenna array using patch-antenna couplers-design and measurement,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 8, pp. 1919–1926, Aug.2002. [16] S. Pajic, Z. Popovic, “An efficient 16-element X-band spatial combiner of switched-mode power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 73, pp., July 2003. [17]I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Distributed active transformer—A new power-combining and impedance-transformation technique,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 316–331, Jan. 2002. [18] T.-C. Tsai, K.-Y. Kao, and K.-Y. Lin, “A K-band CMOS power amplifier with FET-type adpative-bias circuit,” in Proc. Asia-Pacific Microw. Conf., Nov. 2014, pp. 591-593. [19] Bessel Hanafi, Ozan Gürbüz, Hayg Dabag, James F. Buckwalter, Gabriedl Rebeiz and Peter Asbeck, “Q-Band spatially combined power amplifier arrays in 45-nm CMOS SOI,” in IEEE Trans. Microw. Theory Tech., May. 2015. [20] ETS-Lindgren, 3166C Double-Ridged Waveguide Horn datasheet, Sep. 2012. [21] Z.-M. Tsai, Y.-C. Wu, S.-Y. Chen, T. Lee, and H. Wang, “A V-band on-wafer near-field antenna measurement system using an IC probe station,” IEEE Tran. Antennas and Propagation, vol. 61, pp. 2058-2067, Apr. 2013. [22] T.-C. Tsai, “Research on adaptive-bias technique for K-band CMOS power amplifier,” M.S. thesis, GICE., NTU., TW., 2011. [23] Y.-L. Wu, “Minimal non-coupling balun and chip realization of two-dimensional synthesized transmission lines,” M.S. thesis, EE., NTUST., TW., 2014. [24] Y. Chung and T. Itoh, “AlGaN/GaN HEFT power amplifier integrated with microstrip antenna for RF front-end applications,” IEEE Trans. Microw. Theory Tech., vol. 51, no. 2, pp. 653–659, Feb. 2003. [25] W. Wong and Y. P. Zhang, “0.18-μm CMOS push-pull power amplifier with antenna in IC package,” IEEE Microwave Wireless Comp. Lett., vol. 14, no. 1, pp. 13–15, 2004. [26] Y. A. Atesal, B. Cetinoneri, R. A. Alhalabi, and G. M. Rebeiz, “Wafer-scale -band power amplifiers using on-chip antennas,” in IEEE Radio Freq. Integr. Circuits Symp., May 2010, pp. 469–472. | |
dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51386 | - |
dc.description.abstract | 隨著通訊技術和資訊傳遞的快速發展,無線通訊系統需要更緊致且輕薄、同時擁有較長使用時間的發射器。功率放大器在通訊系統中扮演著不可或缺的角色,除了講求增益有放大效果以外,更要求高功率輸出和高效率的操作。由於功率放大器在發射器中消耗了主要部分的能量,因此將效率最佳化是重要的關鍵。為了擁有好的線性度和效率,近來提出許多新的功率放大器架構。
在本論文中,設計並實現了兩種電路,分別為自動調整偏壓架構的差動功率放大器,及以此電路為主體的主動整合式天線電路。前者是利用金氧半場效電晶體(CMOS)製程實現,後者為金氧半場效電晶體(CMOS)及整合被動元件(IPD)製程實現,所設計的頻率為24 GHz頻段。 第一部分實現一操作於K頻段的差動功率放大器,使用一自動調整偏壓架構以節省此放大器的靜態直流功耗,提升此放大器的操作效率。此放大器是使用0.18-μm互補式金氧半導體製作。電路的量測結果顯示,此功率放大器在靜態有104 mW的功耗,且具有6.5 dB的小訊號增益、10.5 dBm的飽和輸出功率,以及在1 dB壓縮點有10 dBm的輸出功率和3.9%的功率附加效率。 第二部分設計並實現一個在K頻段的主動整合式天線電路,包含了使用了自動調整偏壓架構的功率放大器,及一偶極天線(dipole antenna)。此電路採用了自動調整偏壓架構,改善功率放大器操作在小於1-dB壓縮點時的效率;為了減少功率放大器輸出匹配網路之損耗,天線之輸入阻抗設計為功率放大器之最大功率輸出阻抗,顯著改善功率放大器之效率。此主動整合式電路天線利用0.18-μm互補式金氧半導體來製作功率放大器,以及使用整合式被動元件製程來製作天線。電路的量測結果顯示,功率放大器在24 GHz有26.7%的最大功率附加效率,以及在1-dB壓縮點有19-dBm的輸出功率和24.1%的功率附加效率。以上量測果顯示功率放大器的效率有顯著的改善。 | zh_TW |
dc.description.abstract | The demand for more compact, smaller size and longer using time transmitter in wireless communication system has increased according to the rapidly development of communication technique and high date-rate transmission. The power amplifiers (PA), which requires high gain, high output power and high efficiency, plays a necessary role in the communication system. Due to that power amplifier consumes the most dc power in the transmitter, the optimization of the efficiency becomes a key issue. Several new structures of power amplifier are proposed recently in order to achieve good linearity and efficiency.
In this thesis, two circuits are designed and realized. The first is a differential power amplifier using adaptive-bias technique, and the second one is an active antenna integrated with adaptive-bias power amplifier. The former is realized by 0.18-μm CMOS technology while the latter is implemented on CMOS and IPD technology. The operation frequency is 24 GHz. The K-band differential power amplifier which adapts an adaptive-bias technique to increase the efficiency of the power amplifier is described in the first part. This power amplifier is fabricated in 0.18-µm CMOS technology. According to the measurement, the designed PA consumes 104 mW at quiescent state. The power-added-efficiency at OP1dB is 3.9% while maintaining 6.5-dB small-signal gain, 10-dBm OP1dB and 10.5-dBm Psat. In the second part, a K-band active antenna integrated with CMOS adaptive-bias PA is proposed to improve the efficiency of the PA. This circuit includes a CMOS adaptive-bias PA and a dipole antenna; the power amplifier is realized by 0.18-µm CMOS technology and the antenna is implemented on IPD technology. The active antenna integrated with power amplifier adapts the adaptive-bias technique to improve the power amplifier efficiency under back-off operation. Besides, the input impedance of the antenna is designed to be the optimal load of the PA in order to eliminate the loss caused by output matching network, and the efficiency is improved as a consequence. The measurement results of PA shows that the peak PAE is 26.7% and PAE is 24.1% at 19-dBm OP1dB at 24GHz. The measurement results show that the efficiency of the PA is significantly improved. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T13:32:29Z (GMT). No. of bitstreams: 1 ntu-104-R02942078-1.pdf: 14745743 bytes, checksum: e59334b9d8d1999c59f5bf3946d16165 (MD5) Previous issue date: 2015 | en |
dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 iii ABSTRACT iv CONTENTS vi LIST OF FIGURES ix LIST OF TABLES xvi Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 2 1.2.1 Power Amplifier 2 1.2.2 Active Antenna Integrated with Power Amplifier 4 1.3 Contribution 5 1.4 Thesis Organization 6 Chapter 2 Overview of Power Amplifier 7 2.1 Introduction 7 2.2 Important Parameter of Power Amplifier 8 2.2.1 Power 8 2.2.2 Efficiency 9 2.2.3 Linearity 10 2.3 Classification of Power Amplifier 17 Chapter 3 Design of a K-band Differential Adaptive-Bias Power Amplifier 21 3.1 Introduction 21 3.1.1 Motivation 21 3.1.2 Objective 22 3.1.3 Design Flow 23 3.2 Design of Differential Adaptive-Bias Power Amplifier 24 3.2.1 Device and Bias Selection for Power Stage 24 3.2.2 Transformer Design of Power Stage 28 3.2.3 Adaptive-Bias Circuit for Power-Stage Amplifier 35 3.2.4 Power Budget Calculation 47 3.2.5 Gain-Stage Amplifier 48 3.2.6 Two-Stage Power Amplifier 50 3.3 Simulation Results 51 3.3.1 Small-Signal Simulation 51 3.3.2 Large-Signal Simulation 53 3.3.3 Stability Analysis 55 3.4 Measurement Results 58 3.4.1 Small-Signal Measurement 58 3.4.2 Large-Signal Measurement 60 3.5 Debug and Discussion 63 3.6 Summary 74 Chapter 4 Design of a K-band Active Antenna Integrated with CMOS Adaptive-bias Power Amplifier 77 4.1 Introduction 77 4.1.1 Motivation 77 4.1.2 Objective 79 4.2 Design of a K-band Active Antenna Integrated with CMOS Adaptive-bias Power Amplifier 80 4.2.1 Design Flow 80 4.2.2 Power Stage Amplifier 81 4.2.3 Adaptive-bias Circuit for Power-Stage Amplifier 82 4.2.4 Design of Antenna 85 4.2.5 Power Budget Calculation 88 4.2.6 Gain Stage Amplifier 89 4.2.7 Input Balun Design 90 4.2.8 Differential Two-stage Power Amplifier 92 4.3 Simulation Results 94 4.3.1 Small Signal Simulation 94 4.3.2 Large Signal Simulation 96 4.3.3 Stability Analysis 96 4.3.4 Antenna Simulation 99 4.4 Measurement Results 102 4.5 Debug and Discussion 114 4.6 Summary 120 Chapter 5 Conclusion 124 REFERENCE 126 | |
dc.language.iso | en | |
dc.title | 使用互補式金氧半導體與整合被動元件製程之K頻段自動調整偏壓功率放大器及主動天線整合電路研究 | zh_TW |
dc.title | Research on K-band Active Antenna Integrated with Adaptive-bias Power Amplifier Using CMOS and IPD Process | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-1 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 張鴻埜(Hong-Yeh Chang),馬自莊(Tzyh-Ghuang Ma),蔡作敏(Zuo-Min Tsai),蔡政翰(Jeng-Han Tsai) | |
dc.subject.keyword | 功率放大器,K-頻段,自動調整偏壓架構,巴倫器,主動整合式天線電路, | zh_TW |
dc.subject.keyword | Power amplifier,K-band,adaptive-bias technique,balun,active integrated antenna, | en |
dc.relation.page | 129 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2016-02-02 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
顯示於系所單位: | 電信工程學研究所 |
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