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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 林宗賢(Tsung-Hsien Lin) | |
dc.contributor.author | Yi-Lin Tsai | en |
dc.contributor.author | 蔡宜霖 | zh_TW |
dc.date.accessioned | 2021-06-15T13:32:03Z | - |
dc.date.available | 2021-03-08 | |
dc.date.copyright | 2016-03-08 | |
dc.date.issued | 2016 | |
dc.date.submitted | 2016-02-02 | |
dc.identifier.citation | [1] W.-M. Chen, H. Chiueh, T.-J. Chen, C.-L. Ho, C. Jeng, S.-T. Chang, M.-D. Ker, C.-Y. Lin, Y.-C. Huang, T.-Y. Fan, M.-S. Cheng, C.-W. Chou, S.-F. Liang, T.-C. Chien, S.-Y. Wu, Y.-L. Wang, F.-Z. Shaw, Y.-H. Huang, C.-H. Yang, J.-C. Chiou, C.-W. Chang, L.-C. Chou, and C.-Y. Wu, “A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure Control,” IEEE J. Solid-State Circuits, vol. 49, no. 1, pp. 232-247, Jan. 2014.
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/51373 | - |
dc.description.abstract | 近年來應用於短距離的無線通訊系統蓬勃發展,例如近身通訊網路(BAN)與多通道的生理訊號監測系統等,這些系統常使用具有無線收發機之多感測通道生醫監測晶片。由於電池能量是有限的,提升無線收發機的能量效率,使電池延長使用時間成為重要的議題。傳統上,以混波器為主的收發機架構中,功率消耗受限於頻率合成器與混波器,可能令電池的使用時間受到限制。
本論文第一個晶片為設計一個採用相位多工器以及邊緣結合器的BPSK無線發射機。此發射機的邊緣結合器和功率放大器共電流使用,因此可以達到高頻信號僅存於射頻發射的路徑上,本地振盪器只需要操作在低頻,達成低功率要求。此無線發射機採用臺積電0.18-um製程設計,僅消耗0.33 mW,在20 Mbps資料量傳輸時,錯誤向量振幅(EVM)可以低於10%,而輸出功率是-15 dBm。 第二個晶片為描述一個具高能量效率,採用差動式相位調變(D-BPSK)的無線接收機。接收機的核心是利用注入式鎖定振盪器的動態特性,並且利用包絡偵測器兩個電路來完成將相位資訊轉換為振幅資訊。因此,不需要提供絕對相位的鎖相迴路,以及用來降頻的高耗電混頻器,可大幅簡化系統架構,進而降低晶片面積及功率消耗。此接收機是採用臺積電0.18-m製程設計,消耗功率為1.77 mW、接收器的靈敏度為-63 dBm,可以接收高達10 Mbps的訊號,能源效率為177 pJ/bit。 在生醫監測晶片中,多通道會佔掉許多的晶片面積,而且由於通道之間的獨立性,會造成它們之間的增益不匹配。為縮小晶片面積及降低通道之間的增益不匹配,本論文的第三個晶片實現一個低交互失真且小面積的雙通道儀表放大器。在此提出使用正交頻率截波技巧分離兩個通道的微小輸入訊號,並且只使用一個運算放大器完成兩個通道的放大,低交互失真代表兩個信號之間的互相干擾極小,等同於兩個獨立的通道。更進一步,因為共用這個運算放大器也令兩個通道間的增益不匹配降低。此雙通道儀表放大器採用臺積電0.35-um製程製作,在3-V電壓下,消耗27uA,達成交互失真-83 dB,僅使用0.061-mm2的面積。 | zh_TW |
dc.description.abstract | Short-range wireless communication systems such as multichannel sensing/monitoring system and body area network (BAN) are increasingly popular in recent years because of the convenience. A bio-medical system-on-a-chip (SoC) is usually employed in such application scenarios. Due to limited battery power, an energy-efficient wireless transceiver is highly desirable to extend battery life. Therefore, conventional mixer-based transceivers using power hungry mixers and frequency synthesizers are not the ideal choice for this application.
The first part of this dissertation reports a BPSK transmitter which adopts Phase-MUX and edge-combining techniques. Current reuse technique is employed in the power amplifier and the edge combiner, which achieves low-power target. Because high-frequency only exists in the PA path, the local oscillator can operate in the low-frequency band. Fabricated in TSMC 0.18-μm CMOS, the transmitter only consumes 0.33 mW at 20-Mbps data rate. The output power is -15 dBm with an EVM of 10%. The second part presents an energy-efficient 400-MHz D-BPSK receiver. The proposed D-BPSK receiver adopts injection locking technique to perform amplitude-to-phase conversion. This technique can demodulate the PSK modulated signal with envelope detector. The proposed receiver demodulates D-BPSK signal without using Costas loop and mixers, which leads to reduced power consumption and cost. The receiver is fabricated in TSMC 0.18-um CMOS technology. It consumes 1.77 mW with 0.9-V supply. The system sensitivity is -63 dBm. The energy efficiency is 177 pJ/bit with 10-Mbps input signal. In a bio-medical SoC, multiple channels occupy significant chip area, while their independence leads to gain mismatches. The third chip demonstrates a low-crosstalk and small-area two-channel instrumentation amplifier. The proposed orthogonal frequency chopping technique is utilized to separate tiny signals from two different channels. Additionally, these two different signals can be enlarged by the single shared operational amplifier. Low crosstalk means less interference between these two channels. Furthermore, the shared amplifier can reduce gain mismatch between these two channels. Fabricated in TSMC 0.35-um CMOS, the two-channel instrumentation amplifier consumes 27 uA from a 3-V supply, achieving -83-dB crosstalk and 0.061-mm2 chip area. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T13:32:03Z (GMT). No. of bitstreams: 1 ntu-105-D96943009-1.pdf: 2633903 bytes, checksum: a6c890cf3544f4c172c8a67a5828d132 (MD5) Previous issue date: 2016 | en |
dc.description.tableofcontents | Chapter 1 Introduction 1
1.1 Motivation 1 1.2 Dissertation Organization 3 Chapter 2 Design Requirement for a Bio-medical SoC with Wireless Telemetry 4 2.1 Prior Arts of Bio-medical SoCs 4 2.2 Design Requirements of Bio-medical SoCs 6 2.2.1 Data Rate Requirements for Wireless Transceivers 6 2.2.2 Operation Frequency for Bio-medical Applications 7 2.2.3 Digital Modulation Scheme 8 2.2.4 Link Budget Analysis 10 Chapter 3 Introduction to Low-Power Wireless Transceiver 12 3.1 General Architecture of Wireless Transceiver 12 3.2 Low-Power Direct-Modulation Transmitter 15 3.2.1 PLL-Based In-Loop-Modulation Transmitter 15 3.2.2 Polar Transmitter 16 3.2.3 Injection-locking FSK Transmitter 17 3.2.4 Phase-MUX-Based Transmitter 18 3.2.5 Conclusion 19 3.3 Low-Power Receivers 20 3.3.1 Super-Regenerative Receiver (SR RX) 20 3.3.2 Injection-Locked-Based FSK Receiver 21 3.3.3 Injection-Locked-Based BPSK Receiver 22 3.3.4 Reference-less QPSK Receiver 25 3.3.5 Conclusion 26 Chapter 4 An Edge-combining BPSK/D-BPSK Transmitter 27 4.1 Introduction 27 4.2 Proposed architecture 28 4.3 Circuit Implementations 32 4.3.1 9-stage Ring-VCO 32 4.3.2 Pulse Generator 33 4.3.3 Edge-combiner Power Amplifier 34 4.4 Experimental Results 35 4.5 Conclusion 41 Chapter 5 A D-BPSK Receiver with Phase-to-amplitude Conversion Scheme 42 5.1 Introduction of D-BPSK Modulation 42 5.2 Proposed Receiver Architecture 44 5.2.1 Concept of phase-to-amplitude conversion 44 5.2.2 ILO as phase-to-amplitude converter 46 5.2.3 Proposed D-BPSK Receiver Architecture 49 5.3 Gain Requirement of the Proposed Receiver 51 5.4 Circuit Implementations 52 5.4.1 Low Noise Amplifier Design 52 5.4.2 Injection-Locked Oscillator 59 5.4.3 Envelope Detector 62 5.4.4 Data Slicer 64 5.4.5 Fixed-width Pulse Generator (One-shot) 66 5.5 Experimental Results 68 5.5.1 Low-noise Amplifier and DCO Measurement Results 69 5.5.2 Demodulation 70 5.6 Conclusions 78 Chapter 6 A Small-area and Low-crosstalk 2-channel CCIA with Orthogonal Frequency Chopping Technique 79 6.1 Introduction 79 6.2 Prior Arts of Multi-channel Amplifiers 80 6.2.1 Partial OTA Sharing Architecture 80 6.2.2 A 2-Channel Instrumentation Amplifier with Dynamic Element Matching Technique 82 6.2.3 Orthogonal Current-reuse Amplifier 83 6.3 The Proposed 2-Channel CCIA with Orthogonal Frequency Chopping Technique 85 6.4 Design Consideration and Circuit Implementation 91 6.5 Experimental Results 94 Chapter 7 Conclusion 100 References 103 Publication List 114 International Journal 114 International Conference 114 | |
dc.language.iso | en | |
dc.title | 適用於生醫應用之射頻收發機與雙通道類比前端放大器設計 | zh_TW |
dc.title | Design of an RF Transceiver and a Two-channel Analog Front-end Amplifier for Bio-medical Applications | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-1 | |
dc.description.degree | 博士 | |
dc.contributor.oralexamcommittee | 劉深淵,呂學士,許孟烈,黃柏鈞,許雲翔 | |
dc.subject.keyword | 類比前端放大器,低功率無線收發機,動態相位對振幅轉換, | zh_TW |
dc.subject.keyword | analog front-end amplifier,low-power transceiver,dynamic phase-to-amplitude conversion, | en |
dc.relation.page | 114 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2016-02-02 | |
dc.contributor.author-college | 電機資訊學院 | zh_TW |
dc.contributor.author-dept | 電子工程學研究所 | zh_TW |
顯示於系所單位: | 電子工程學研究所 |
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