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完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.advisor | 陳敏璋(Miin-Jang Chen) | |
dc.contributor.author | Yi-Ping Lin | en |
dc.contributor.author | 林益平 | zh_TW |
dc.date.accessioned | 2021-06-15T12:43:52Z | - |
dc.date.available | 2021-07-01 | |
dc.date.copyright | 2016-08-23 | |
dc.date.issued | 2016 | |
dc.date.submitted | 2016-07-26 | |
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dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/50510 | - |
dc.description.abstract | 隨著半導體產業的發展,電晶體的尺度越來越小,傳統的二氧化矽(silicon dioxide)閘極介電層逐漸不符合半導體技術節點(technology node)的需求,因此須由高介電常數材料取代二氧化矽作為金氧半場效應電晶體(Metal Oxide Semiconductor Field Effect Transistor, MOSFET)的閘極介電層。本論文利用原子層沉積技術(Atomic Layer Deposition, ALD)成長二氧化鋯(zirconium dioxide)薄膜,探討利用氬氣電漿(argon plasma)進行處理的二氧化鋯閘極介電層,所呈現的電性表現。此外,近年來,氮化鈦(titanium nitride)被提出可以作為金屬氧化物半導體(Metal Oxide Semiconductor, MOS)元件的金屬閘極(metal gate)。因此,本研究進一步探討在此二氧化鋯閘極介電層之上,疊上一層氮化鈦薄膜作為金屬閘極,其MOS元件的電性表現。另外,為了達成高效能(high performance)的金屬氧化物半導體電晶體,金屬閘極的功函數希望可以調整到接近矽半導體的傳導帶(conduction band)(4.1 eV)或價電帶(valence band)(5.2 eV),本論文藉由氮化鈦作為金屬閘極,我們調整並量測氮化鈦在二氧化鋯閘極介電層的功函數值,期許可以調整金屬的功函數,達到nMOS或pMOS所需的要求。 | zh_TW |
dc.description.abstract | With the development of the semiconductor industry, the feature size of the transistors continues shrinking .The traditional SiO2 gate oxide does not fulfill the requirement of technology node. Therefore, the high-k materials was substituted for the conventional SiO2 as the gate dielectric of metal-oxide-semiconductor (MOS) devices. In this thesis, ultrathin ZrO2 dioxide was deposited by atomic layer deposition (ALD) and the argon plasma treatment was used to tailor the electrical properties of the ZrO2 gate dielectric. Moreover, in recent years, it has been reported that TiN is capable of being used as metal gate in MOSFET. Thus, a layer of TiN was deposited by ALD on the ZrO2 gate dielectric as the metal and the electrical characteristics of the MOS device were investigated. Besides, for high performance MOS transistor, the effective work function of metal gate is expected to be close to the conduction band (4.1eV) or valence band (5.2eV) of the silicon. Thus the effective work function of TiN was also modulated and measured in this study. | en |
dc.description.provenance | Made available in DSpace on 2021-06-15T12:43:52Z (GMT). No. of bitstreams: 1 ntu-105-R03527038-1.pdf: 3890724 bytes, checksum: 0f14fd1f39a2a59e7b34d0681b12a5de (MD5) Previous issue date: 2016 | en |
dc.description.tableofcontents | 致謝 III
中文摘要 IVV Abstract V 目錄 VII 圖目錄 VIIII 表目錄 X 第一章 簡介 1 1.1 研究動機 1 1.2 高介電係數材料 3 1.3 原子層沉積技術 6 1.4 TiN基本性質 10 1.4.1 TiN基本結構 10 1.4.2 原子層沉積成長TiN薄膜 11 1.5 論文導覽 17 1.6 參考文獻 18 第二章 二氧化鋯電漿處理電性表現 20 2.1 簡介 20 2.2 實驗步驟 21 2.2.1 TDMAZ前驅物介紹 21 2.2.2 ZrO2 ALD製程 22 2.2.3 電漿處理ZrO2的製程種類 25 2.3 實驗結果與討論 27 2.3.1 ZrO2電性 27 2.3.2 氬氣電漿處理ZrO2電性 30 2.4 結論 36 2.5 參考文獻 38 第三章 氮化鈦疊二氧化鋯電性表現 39 3.1 簡介 39 3.2 實驗步驟 39 3.2.1 TiN疊ZrO2製程與結構 39 3.2.2 TiN於不同ZrO2界面處理的製程 41 3.3 實驗結果與討論 42 3.4 結論 49 3.5 參考文獻 50 第四章 氮化鈦疊二氧化鋯調整功函數 51 4.1 簡介 51 4.2 實驗步驟 52 4.2.1 Pt/TiN/SiO2之功函數 52 4.2.2 Pt/TiN/ZrO2/SiO2之功函數 54 4.3 實驗結果與討論 54 4.3.1 Pt/TiN/SiO2之功函數 54 4.3.2 Pt/TiN/ZrO2/SiO2之功函數 59 4.4 結論 63 4.5 參考文獻 65 第五章 總結 67 | |
dc.language.iso | zh-TW | |
dc.title | 高介電係數二氧化鋯/氮化鈦金屬閘極堆疊之研究 | zh_TW |
dc.title | Study of ZrO2/TiN High-K/Metal Gate Stacks | en |
dc.type | Thesis | |
dc.date.schoolyear | 104-2 | |
dc.description.degree | 碩士 | |
dc.contributor.oralexamcommittee | 廖洺漢(Ming-Han Liao),吳肇欣(Chao-Hsin Wu),李峻霣(Jiun-Yun Li) | |
dc.subject.keyword | 原子層沉積技術,二氧化鋯,氮化鈦,功函數,電漿處理,金屬閘極, | zh_TW |
dc.subject.keyword | Atomic layer deposition (ALD),zirconium dioxide (ZrO2),titanium nitride (TiN),work function,plasma treatment,metal gate, | en |
dc.relation.page | 69 | |
dc.identifier.doi | 10.6342/NTU201600720 | |
dc.rights.note | 有償授權 | |
dc.date.accepted | 2016-07-27 | |
dc.contributor.author-college | 工學院 | zh_TW |
dc.contributor.author-dept | 材料科學與工程學研究所 | zh_TW |
顯示於系所單位: | 材料科學與工程學系 |
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