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標題: | K頻段功率放大器線性度提升技術 K-band Power Amplifier with Linearity Enhancement Techniques |
作者: | Yu-Chen Chen 陳宥辰 |
指導教授: | 盧信嘉(Hsin-Chia Lu) |
關鍵字: | 功率放大器,線性度,K頻段,預失真,寄生二極體線性器,三階互調失真,退縮功率附加效率,最佳偏壓選擇,自動調整偏壓技術, power amplifier,linearity,K-band,pre-distortion,parasitic diode linearizer,IMD3,back-off power-added-efficiency,optimal bias selection,adaptive-bias, |
出版年 : | 2016 |
學位: | 碩士 |
摘要: | 此篇論文提出了兩個實現於台積電0.18-μm互補式金氧半導體製程應用於K頻段之功率放大器,旨在提升電路的線性度、輸出功率、功率附加效率以及退縮功率附加效率的表現。
於第一個電路中,我們採用了預失真寄生二極體線性器,功率放大器使用了1.8 V偏壓給電,級間加入了寄生二極體線性器以提高電路整體線性度。此三級共源極之功率放大器在1.8 V以及線性器1.4 V開啟的情況下,實際量測可得K頻段操作的小訊號增益最大值為13.9 dB、OP1dB為14.1 dBm以及15.7 dBm的飽和輸出功率,PAE最大值以及位於OP1dB位置的PAE則分別為14.2%與12.1%,而在P1dB退縮6-dB位置的PAE是為5.2%。再經由雙調測試,可以觀察到此電路出現了一甜蜜點,其在三階互調失真的部分將有18 dBc的消除。 在第二個電路中,依據最佳偏壓理論以3 V對功率放大器給電。兩級疊接架構能提供較高增益,也可降低電路匹配複雜度。在加入自動調整偏壓技術後,功率放大器在小訊號操作時將偏壓在AB類操作,大訊號操作時,則自動調整偏壓至A類操作。故可以透過此技術改善在P1dB退縮6-dB位置的PAE、降低電路靜態操作時的直流功耗。根據模擬結果,此功率放大器於K頻段操作的小訊號增益最大值為19 dB、OP1dB為16.9 dBm,位於OP1dB位置的PAE則為11.6%。相較A類操作,自動調整偏壓技術可降低約30%的直流功耗、在P1dB退縮6-dB位置的PAE則可獲得1.1%提升。由實際量測結果,大訊號表現未若模擬結果佳,但自動調整偏壓技術依然能省去14.5%直流功耗。另外為了達到最初的電路規格,我們也嘗試調整最佳化的量測結果。 兩個功率放大器中模擬與實際量測的差異因素將會逐一討論,其包括了電磁後模擬的考慮不周、電阻阻值選定、毫米波頻段下的寄生效應以及溫度影響等,我們亦將提供除錯之結果。 In this thesis, two K-band power amplifiers implemented in TSMC 0.18-μm CMOS process are proposed to improve the linearity, output power, PAE and the back-off 6-dB efficiency. First, a K-band power amplifier using 1.8 V supply voltage utilizing pre-distortion parasitic diode linearizer is designed and measured. Parasitic diode linearizer is utilized to improve overall circuit linearity. With 1.4 V control voltage for the linearizer of 3-stage CS PA turned on, the measured peak small signal gain is 13.9 dB, OP1dB is 14.1 dBm, and saturation power is 15.7 dBm. The PAE has a value of 12.1% at OP1dB, and 5.2% at 6-dB back-off from P1dB. Third-order intermodulation distortion (IMD3) can be mitigated to about 18 dBc when the sweet spot appears under two-tone measurement. Second, a K-band power amplifier using optimal-selected 3 V supply voltage adopting adaptive-bias technique is designed and measured. The 2-stage cascode PA can provide higher gain and reduce matching complexity. With adaptive-bias circuit, power amplifier can be biasd at class-AB in small signal operation and class-A in large signal operation. Therefore, PAE at 6-dB back-off from P1dB can be improved, and DC power consumption can be reduced. According to the simulation results, this K-band cascade PA provides 19 dB small signal gain, OP1dB is 16.9 dBm, and PAE at OP1dB is 11.6%, PAE at 6-dB back-off from P1dB is 4.6%. Compared with the fixd-bias Class-A PA, the proposed PA saves about 30% power consumption, and the PAE at 6-dB back-off from P1dB can be improved 1.1%. According to the measurement results, large-signal performance is not as good as simulation, but 14.5% DC power consumption can be reduced by the adaptive-bias circuit. In order to meet the specification of this power amplifier, measurement results under optimized condition are provided as well. The differences between simulation and measurement of both power amplifiers are discussed including factors such as EM post-simulation, resistance selection, parasitic effect and temperature. Finally, debug results are provided. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/49546 |
DOI: | 10.6342/NTU201602823 |
全文授權: | 有償授權 |
顯示於系所單位: | 電子工程學研究所 |
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