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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 資訊工程學系
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/49212
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor劉邦鋒
dc.contributor.authorKuang-Hung Hsiaoen
dc.contributor.author蕭光宏zh_TW
dc.date.accessioned2021-06-15T11:19:31Z-
dc.date.available2016-08-26
dc.date.copyright2016-08-26
dc.date.issued2016
dc.date.submitted2016-08-18
dc.identifier.citation[1] Arkaprava Basu, Jayneel Gandhi, Jichuan Chang, Mark D. Hill, and Michael M. Swift. Efficient virtual memory for big memory servers. In Proceedings of the 40th Annual International Symposium on Computer Architecture, ISCA ’13, pages 237–248, New York, NY, USA, 2013. ACM.
[2] Fabrice Bellard. Qemu, a fast and portable dynamic translator. In Proceedings of the Annual Conference on USENIX Annual Technical Conference, ATEC ’05, pages 41–41, Berkeley, CA, USA, 2005. USENIX Association.
[3] Chao-Jui Chang, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu, and Pen-Chung Yew. Efficient memory virtualization for cross-isa system mode emulation. In Proceedings of the 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE ’14, pages 117–128, New York, NY, USA, 2014. ACM.
[4] J. H. Ding, P. C. Chang, W. C. Hsu, and Y. C. Chung. Pqemu: A parallel system emulator based on qemu. In Parallel and Distributed Systems (ICPADS), 2011 IEEE 17th International Conference on, pages 276–283, Dec 2011.
[5] Jayneel Gandhi, Arkaprava Basu, Mark D. Hill, and Michael M. Swift. Efficient memory virtualization: Reducing dimensionality of nested page walks. In Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-47, pages 178–189, Washington, DC, USA, 2014. IEEE Computer Society.
[6] Ding-Yong Hong, Chun-Chen Hsu, Cheng-Yi Chou, Wei-Chung Hsu, Pangfeng Liu, and Jan-Jan Wu. Optimizing control transfer and memory virtualization in full system emulators. ACM Trans. Archit. Code Optim., 12(4):47:1–47:24, December 2015.
[7] Ding-Yong Hong, Chun-Chen Hsu, Pen-Chung Yew, Jan-Jan Wu, Wei-Chung Hsu, Pangfeng Liu, Chien-Min Wang, and Yeh-Ching Chung. Hqemu: A multi-threaded and retargetable dynamic binary translator on multicores. In Proceedings of the Tenth International Symposium on Code Generation and Optimization, CGO ’12, pages 104–113, New York, NY, USA, 2012. ACM.
[8] Chris Lattner and Vikram Adve. Llvm: A compilation framework for lifelong program analysis & transformation. In Proceedings of the International Symposium on Code Generation and Optimization: Feedback-directed and Runtime Optimization, CGO ’04, pages 75–, Washington, DC, USA, 2004. IEEE Computer Society.
[9] Kevin P. Lawton. Bochs: A portable pc emulator for unix/x. Linux J., 1996(29es), September 1996.
[10] Mendel Rosenblum, Stephen A. Herrod, Emmett Witchel, and Anoop Gupta. Complete computer system simulation: The simos approach. IEEE Parallel Distrib. Technol., 3(4):34–43, December 1995.
[11] Xin Tong, Toshihiko Koju, Motohiro Kawahito, and Andreas Moshovos. Optimizing memory translation emulation in full system emulators. ACM Trans. Archit. Code Optim., 11(4):60:1–60:24, January 2015.
[12] Zhaoguo Wang, Ran Liu, Yufei Chen, Xi Wu, Haibo Chen, Weihua Zhang, and Binyu Zang. Coremu: A scalable and portable parallel full-system emulator. In Proceedings of the 16th ACM Symposium on Principles and Practice of Parallel Programming, PPoPP ’11, pages 213–222, New York, NY, USA, 2011. ACM.
[13] Zhe Wang, Jianjun Li, Chenggang Wu, Dongyan Yang, Zhenjiang Wang, Wei-Chung Hsu, Bin Li, and Yong Guan. Hspt: Practical implementation and efficient management of embedded shadow page tables for cross-isa system virtual machines. In Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE ’15, pages 53–64, New York, NY, USA, 2015. ACM.
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/49212-
dc.description.abstract本篇論文探討在 64 位元系統下,藉由將被模擬系統中部份 64 位元虛擬地址空間嵌入模擬系統之 64 位元虛擬地址空間,進而利用嵌入式陰影分頁表改善 64 位元系統模擬效能的有效性。
根據被模擬系統中 64 位元作業系統所支持的虛擬地址空間大小是否小於模擬系統中可使用之 64 位元虛擬地址空間大小,我們將 64 位元系統模擬分成兩種情況,並分別對這兩種情況設計一套嵌入式陰影分頁表系統。
在 x86-64 系統模擬 AArch64 系統的情境下,我們第一種嵌入式陰影分頁表系統執行 SPEC CINT2006 的效能平均能比 QEMU 快 1.47 倍。我們第二種嵌入式陰影分頁表的系統實做尚未完成,因此在 SPEC CINT2006 十二個 benchmark 中我們的系統只能加速其中五個,且只能比 QEMU 快 1.09 倍。然而我們設計的兩種嵌入式陰影分頁表系統在系統開機的模擬效能都沒有辦法比 QEMU 好。
zh_TW
dc.description.abstractThis thesis investigates the effectiveness of using Embedding Shadow Page Table (ESPT) to improve 64-bit guest architecture emulation performance on 64-bit host system by embedding part of guest virtual address space into host virtual address space.
We divide 64-bit system emulation into two cases, restricted case and general case, based on whether the size of 64-bit guest operating system supported virtual address space is smaller than the size of available host virtual address space. We proposed two ESPT system designs for those two cases.
In AArch64-to-x86_64 system emulation, our restricted case ESPT system achieves an average speedup of 1.47 on SPEC CINT2006 benchmarks compared with QEMU. Our not yet complete general case ESPT system only improves five out of twelve benchmarks and achieves a speedup of only 1.09. However, neither of our system designs can improve system boot benchmarks.
en
dc.description.provenanceMade available in DSpace on 2021-06-15T11:19:31Z (GMT). No. of bitstreams: 1
ntu-105-R03922081-1.pdf: 1282453 bytes, checksum: 82d37392e6e9a3b14119695b0dee1c98 (MD5)
Previous issue date: 2016
en
dc.description.tableofcontentsContents
口試委員會審定書 i
Acknowledgement ii
Chinese Abstract iii
Abstract iv
Contents v
List of Figures vii
List of Tables ix
1 Introduction 1
2 Related Works 4
3 Background 8
3.1 QEMU System Mode Memory Emulation . . . . . . . . . . . . . . . . . 8
3.1.1 QEMU Address Translation Steps . . . . . . . . . . . . . . . . . 9
3.2 Embedded Shadow Page Table . . . . . . . . . . . . . . . . . . . . . . . 11
4 System Design 14
4.1 Restricted Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.1 Where? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1.2 How? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2 General Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2.1 Where? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2.2 How . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3.1 Shadow Page Mapping Creation . . . . . . . . . . . . . . . . . . 23
4.3.2 Multi-Process Emulation . . . . . . . . . . . . . . . . . . . . . . 23
5 Experiment 27
5.1 Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2 Benchmarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 Evaluation Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3.1 Restricted Case . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3.2 General Case . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6 Conclusion 42
Bibliography 44
dc.language.isoen
dc.subject跨指令集架構動態二進制翻譯zh_TW
dc.subject嵌入式陰影分頁表zh_TW
dc.subject系統模擬zh_TW
dc.subject記憶體虛擬化zh_TW
dc.subjectQEMUzh_TW
dc.subjectQEMUen
dc.subjectsystem mode emulationen
dc.subjectembedded shadow page tableen
dc.subjectcross-ISA dynamic binary translationen
dc.subjectmemory virtualizationen
dc.title利用嵌入式陰影分頁表改善 QEMU 64 位元架構系統模擬效能zh_TW
dc.titleUsing Embedded Shadow Page Table to Improve the Performance of QEMU 64-bit Architecture System Emulationen
dc.typeThesis
dc.date.schoolyear104-2
dc.description.degree碩士
dc.contributor.coadvisor吳真貞
dc.contributor.oralexamcommittee洪鼎詠
dc.subject.keyword記憶體虛擬化,跨指令集架構動態二進制翻譯,嵌入式陰影分頁表,QEMU,系統模擬,zh_TW
dc.subject.keywordmemory virtualization,cross-ISA dynamic binary translation,embedded shadow page table,QEMU,system mode emulation,en
dc.relation.page46
dc.identifier.doi10.6342/NTU201602941
dc.rights.note有償授權
dc.date.accepted2016-08-19
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept資訊工程學研究所zh_TW
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