Skip navigation

DSpace

機構典藏 DSpace 系統致力於保存各式數位資料(如:文字、圖片、PDF)並使其易於取用。

點此認識 DSpace
DSpace logo
English
中文
  • 瀏覽論文
    • 校院系所
    • 出版年
    • 作者
    • 標題
    • 關鍵字
  • 搜尋 TDR
  • 授權 Q&A
  • 幫助
    • 我的頁面
    • 接受 E-mail 通知
    • 編輯個人資料
  1. NTU Theses and Dissertations Repository
  2. 工學院
  3. 工業工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48912
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor吳政鴻(Cheng Hung WU)
dc.contributor.authorTse-Horn Chengen
dc.contributor.author鄭澤鴻zh_TW
dc.date.accessioned2021-06-15T11:11:23Z-
dc.date.available2026-08-23
dc.date.copyright2016-08-30
dc.date.issued2016
dc.date.submitted2016-08-23
dc.identifier.citation[1] 台積電開放創新平台網頁(open innovation platform) http://www.tsmc.com.tw/chinese/dedicatedFoundry/services/oip.htm
[2] 陳婉儀,2015,工研院 IEK IT IS計畫,ITIS產業評析半導體晶圓製造製程技術發展概況,頁1,經濟部技術處計畫成果報告,http://www.itis.org。
[3] 台積電2015年Business overview(營業報告書) http://www.tsmc.com.tw/download/ir/annualReports/2015_Business_Overview_E.pdf。
[4] 陳婉儀,2015,邏輯元件與記憶體的製程發展趨勢,工研院 IEK ITIS 計畫, IT IS產業評析第二頁http://www.itis.org.tw 經濟部技術處計畫成果報告
[5] 陳玲君,IMEC整合IC創新價值生態鏈,歐盟利用群聚提升半導體競爭力,ITIS產業評析,出版日期:2012/03/15。
[6] 工研院2014/4/27-28國際超大型積體電路技術、系統暨應用研討會(VLSI-TSA)設計、自動化暨測試研討會(VLSI-DAT)演講資料
[7] 陳玲君,2011全球推動3D IC標準組織和活動,IEK 3D IC國際標準訂定,產經中心, http://ieknet.iek.org.tw/BookView.do?domain=2&rptidno=948896521
[8] 彭茂榮,1Q16全球半導體銷售額排名,工研院IEK產業情報網,http://ieknet.iek.org.tw/BookView.do?domain=20&rptidno=41827210。
[9] 薛文蔚、徐世昌,2009,贏在競合(Fair Collaboation),商周出版。
[10] Nooteboom,B.,Inter-firm Collaboration,learning and networks,
http://samples.sainsburysebooks.co.uk/9781134330515_sample_519201.pdf
[11] Bain, J. S., (1954). Economies of Scale, Concentration, and the Condition of Entry in Twenty Manufacturing Industries. The American Economic Review Vol. 44, No. 1, 15-39
[12] Bain, J. S. (1956). Barriers to New competition. Harvard University Press
[13] Bain, J. S. (1962). Barrier to new competition: the character and consequence in manufacturing industries, Harvard university press
[14] Burgess, G. H. Jr. (1995). The Economics of Regulation and Antitrust. Harper Collins College Publisher
[15] Bain, J. S. (1962). structure-conduct-performance (SCP model)
[16] Mcafee, R. P., Mialon, H. M., & Williams, M. A. (2004). Entry barriers in economic and antitrust analysis. AEA PAPERS AND PROCEEDINGS, 4,11-1
[17] Digitimes,2015,物聯網大軍打通網路任督二脈醞釀新一波市場熱潮http://www.digitimes.com.tw/tw/dt/n/shwnws.asp?CnlID=1&Cat=60&id=0000443435_C1I5P18C2DX8M36E51MSD&query=%AA%AB%C1p%BA%F4
[18] McGrath, R. G., (2015). The end of Competitive Advantage: How to keep your strategy moving as fast as your business, 2015/10/29
[19] 顏雅倫,2000,台灣大學法研所碩士論文。
[20] Viscusi, W. K., Vernon, J. M., & Harrington, J. E. Jr., supra note12, at 159; Burgess, G. H. Jr., supra note21, at 226.
[21] 台灣趨勢研究(TTR),2015年半導體製造業發展趨勢。
http://www.twtrend.com/upload/shares/a_14508371260.pdf
[22] 台灣積體電路公司,2015 TSMC More-than-Moore technologies provide additional-values,http://www.tsmc.com.tw/chinese/dedicatedFoundry/technology/mtm.htm
[23] 莊春發,1998。競爭概念的發展、演變與反托拉斯政策,公平交易季刊第六卷第一期,頁39。
[24] 資策會產業情報研究所,2016。2015年度資通訊產業分析報告。
[25]顏和正標竿企業的瞬時競爭,2015天下雜誌, http://www.cw.com.tw/article/article.action?id=5071893
[26] Research Bulletin May 20, 2015 IC Insights’ Strategic Review, http://www.electronicspecifier.com/around-the-industry/the-top-10-semiconductor-r-d-spenders-in-2015.
[27] Fahri Karakaya and Michael J. Stahl, Barriers to Entry and Market Entry Decisions in Consumer and Industrial Goods Markets
Journal of Marketing Vol. 53, No. 2 (Apr., 1989), pp. 80-91
[28] Kenneth C. Robinson and Patricia Phillips McDougall,Entry Barriers and New Venture Performance: A Comparison of Universal and Contingency Approaches
Strategic Management Journal. Vol. 22, No. 6/7, Special Issue: Strategic Entrepreneurship: Entrepreneurial Strategies for Wealth Creation (Jun. - Jul., 2001), pp. 659-685, Published by: Wiley
[29] Michael E. Porter Competitive Strategy: Techniques for Analyzing Industries and Competitors, The Free Press (1998)
[30] Cook, Kenneth J. The AMA Complete Guide to Strategic Planning for Small Business. Chicago: American Marketing Association, 1995.
[31] Geroski, Paul A. 'Keeping Out the Competition.' Financial Times. February 23, 1996.
[32] Harris, Lloyd. 'Barriers to Market Orientation: The View from the Shopfloor.' Marketing Intelligence and Planning. March-April 1998.
[33] Porter, Michael E. Competitive Strategy: Techniques for Analyzing Industries and Competitors. New York: Free Press, 1980.
[34] Urban, Glen L., and Steven H. Star. Advanced Marketing Strategy. Englewood Cliffs, NJ: Prentice Hall, 1991.
[35] Aaker, David A. Developing Business Strategies. 2d ed. John Wiley and Sons, 1988.
[36] Abrams, Rhonda M. The Successful Business Plan: Secrets and Strategies. Rev. ed. Oasis Press, 1993.
[37] Clark, Ian. 'Corporate Human Resources and 'Bottom Line' Financial Performance.' Personnel Review. July 1999.
[38] Harari, Oren. 'The Hypnotic Danger of Competitive Analysis.' Management Review. August 1994.
[39] Lucas, James R. Fatal Illusions. Amazon, 1997.
[40] Sheiman, Bruce. 'Boost Your New Title with Competitive Analysis.' Folio: The Magazine for Magazine Management. September 1, 1994.
[41] Zahra, Shaker A. 'Unethical Practices in Competitive Analysis: Patterns, Causes, and Effects.' Journal of Business Ethics. January 1994.
[42] Zahra, Shaker A., and Sherry S. Chaples. 'Blind Spots in Competitive Analysis.' The Academy of Management Executive. May 1993.
[43] Dylan McGrath, 2011, http://www.eetimes.com/document.asp?doc_id=1258354
[44] Electronics weekly, http://www.electronicsweekly.com/news/business/arm-tsmc-join-up-for-7nm-2016-03/
[45] Kathryn Rudie Harrigan,Barriers to entry and competitive strategies, 1981
[46] Harold Demsetz, Journal of Law and Economics, 1983, vol. 26, issue 2, p375-90
[47] Buckley, P. J.; Casson, M. C. (1988): A theory of cooperation in international business, in: Contractor, F. J.; Lorange, P. (eds.): Cooperative strategies in international business: Joint ventures and technology partnerships between firms, Lexington, MA: Lexington Books, p. 31-54.
[48] IC Insights,http://www.icinsights.com/news/bulletins/Samsung-TSMC-Remain-Tops-In-Available-Wafer-Fab-Capacity/ ,2015
dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48912-
dc.description.abstract台積電(TSMC)自1987年成立後,時至2015年底其年營業額已來到488億美元,並囊括全球近55%的市佔率,其中先進製程超過70%的市佔率。且年成長率超過6%,堪稱為全球晶圓代工產業界最具競爭力的業者。由於獲利佳,近年來已引起全球半導體前兩大IDM公司Intel及三星積極加碼投入,台積電如何持續保持既有的競爭優勢已是眼前最重要的課題。
本研究係以晶圓代工產業的內/外部製環境分析為主體,並以台積電為主要探討對象,探討台積電在晶圓代工產業下其競爭模型和價值鏈活動行為,得知其持續獲取經濟利潤的原因後,再據此與其現行實施的競爭策略,即通過成本領先、客戶願意支付溢價的差異化、清楚市場定位的集中策略及創新策略等定義其競爭力。透過與既有競爭對手的優劣勢比較,找出其競爭強勢指標及競爭優勢地位後,篩選出台積電的關鍵成功因素(先進的製程領先、整合性技術服務及充足的產能),並闡述此三大因素的優勢成因所在,藉此做為後續我國晶圓代工產業保持競爭領先策略的參考與研究。
尤其自2015年後,全球經濟停滯及3C產業達到飽和狀態,台積電仍逆勢操作並積極跨入10及7奈米製程,並提升了28與16奈米製程量產的效能,持續投入資本支出並佈局最先進製程,並加強成熟製程及對新興物聯網裝置製程技術需求。尤其是半導體製程在近兩年全球的人工智慧、高速運算、虛擬及擴充實境、汽車電子、穿戴裝置、物聯網及大數據高需求的帶動趨勢下,未來即將是積體電路(Integrated Circuit,IC)設計公司蓬勃發展的大好時機。因此,在大環境驅使下,晶圓代工廠如何擴大價值,建立設計平台支援IC設計公司使其產品能儘早量產,並讓其產品在利潤最佳的時機及價格以最適合的規格上市,使客戶保持高市場佔有率成為一重要議題。本研究也探討晶圓代工廠針對先進製程技術如何配合發展出具備跨代工廠提供給設計廠商的製程設計套件,該套件完全經過先進製程驗證,象徵著晶圓代工廠落實開放創新平台(Open Innovation Platform,OIP) [1],並強化了其在客製化、類比、混合訊號與射頻(Radio Frequency,RF)設計方面的創新,跨越了多個基於IC設計工具業界Open Access的電子設計自動化(Electronic Design Automation,EDA)設計環境,不再需要多個專有射頻晶圓專工設計套件(Package Design Kits,PDK),在不同的客製IC設計工具組間,也能全面再使用所有的設計資料,讓原有已驗證設計資料(IP)可以用在下一個產品裡,縮短新產品的開發及研發人力。
本研究目的為(1)檢視晶圓代工系統之IP服務和商業模式;(2)了解晶圓代工廠提供價值平台與IC設計公司的生態 (3)探索個案晶圓代工公司提供IC設計公司之合作模式,並以個案研究法針對晶圓代工提供設計服務的方法進行研究,採用深度訪談法對臺灣企業高階主管以半結構性訪談方式進行調查,以利研究資料的蒐集。本研究以IC設計服務和IC設計EDA軟體商及晶圓製造供應商三個構面進行觀察,並對個案公司未來可能之發展方向。從研究結果得知,IC設計公司需要的晶圓廠提供技術資源,其組成包含:(a)IP模組系統;(b)設計軟體工具系統;(c)設計測試及製造驗證及最佳化系統。研究結果發現,個案公司除應強調製程技術及服務並重的商業模式之外,特別需要提供完整的IC設計平台,因為先進製程的複雜程度已經超出以往傳統的設計方法,如果能(1)保持高設計門檻但不與客戶競爭並超越其他晶圓代工廠並協助客戶加大其他優勢例如:(2)製造品質與設計模組化快速整合能力;(3)上下游資源的整合和資訊管理;(3)規避風險及可信賴的設計系統;(4) 協助設定高性價比及客製化產品策略 (5) 客戶集中資源在系統創新及價值的價值服務。因此,個案公司的策略除了保持技術領先及擴充最大產能及運籌服務外,更需要強化核心設計技術服務競爭力協助客戶,而其關鍵包括(a)與IC設計及IC設計工具軟體公司產品結合;(b)技術研發roadmap與其他設備廠商結盟 (c)創新設計與製造技術結合的平台透明化(d)與價值鏈供應商策略聯盟資本化。
zh_TW
dc.description.abstractLocal Foundry TSMC in Taiwan is developing the deep sub-micro 7nm/10nm in year 2015 and has achieved the 16/28nm FINFET volume production with high speed, low power and cost effective to customers and become the largest revenue of worldwide wafer foundry. The overall Taiwan semiconductor foundries contribute total revenue over 50B USD. Despite the progress that has been achieved, most major foundries (TSMC, Intel, Samsung etc.) keep invest enormous capital expense (CAPEX) continuously on leading edge technology include mature (or specialty process) and new emerging Internet of Things (IoT) technology for booming business and new era of big data. Moreover, the leading technology for ultra-low power and sensors and System in Package (SiP) assembly need been integrated vertically with upstream equipment, material manufacturer and EDA tool vendor on supply chain through IP Alliance to serve the new opportunity by new advance process technologies and IC design open innovation ecosystem to speed up the design and shorten the product time to market. TSMC drives the open innovation platform in order to inject new process technology requirements into design ecosystem so the TSMC customers can design into TSMC technology early and have smoother and faster production. As the technology moving to most advance technology, the design requirements, challenges and complexity have been increasing dramatically. It’s difficult for customer to find out , validate and integrate by themselves. TMSC provide the platform to enable design ecosystem to find out solution. To validate their solutions, and to provide customers one-stop shopping solution. Such design platform deliverables includes design collaterals of qualified EDA tools and corresponding tech files , process design kits. DFM (design for manufacturing) data kits, reference flows, foundation IPs of standard cells, I/Os, memory compilers, foundation and specialty IPs. All customers use commercial EDA tools to design in TSMC process technology, and the majority and increasing number of customers use commercial IPs in their designs. That validated the importance of timely completion of design infrastructure through the collaboration with design ecosystem partners. The key to the success of design ecosystem partnership is enablement collaboration. Base on TSMC in-house design knowhow and expertise, the ecosystem act as the focal point for ecosystem partners to interface with TSMC process technology, bridges the gap between new technology and design requirements and ecosystem’s existing capabilities, identifies enhancements needs, provides partners with EDA ( electronic design automation) and IP enablement kits for customer to effectively implement the needed changes timely. As a result, TSMC and partners jointly create synergy combining innovation and strengths of the whole design ecosystem to collectively deliver complete solutions for customers to use. Recently TSMC announce 7nm process has entered try run phase and 16nm volume production number of tape outs has emerging much faster comparing to 28nm(HKMG) at the same time. Through Design ecosystem collaboration with partners and participated the upcoming design challenges associated with 7nm technology. On the EDA sides, the efforts include enhancement in various EDA tools, creation of tech files/PDKs associated with those tools, and design methodology innovation for customers to design in 7nm. On another IP sides, early availability of critical IPs with competitive PPA (power, performance and area) is the key to enable customer design work. Moreover, the interoperable design package for different design environments migration are essential to meet design accuracy also reduce the design cycle time and transaction cost and IP reusability. Building the ecosystem and partnership with trust remains one of the greatest problems within the open innovation platform by game theory, risk management and transfer cost to enhance the strength to resolve customer competition. The strategy of technology roadmap and design collaboration become challengeable and essential to practical methods of projects and partnership for all stakeholders with a relatively high rate of effectiveness.
This study aims to build the entry barrier to keep leading position and to examine (1) qualified IP and design methodology to speed up the industrial development and product platform (2) the evolution of resource and information integration; (3) Eliminate potential risks and trust the proven design system to engage customers (4) resource planning by innovation and value service of design support. Case study methodology was conducted for this interview survey with CEO of semiconductor technology incorporation in Taiwan. Partnership, EDA flow and design environment and technology were observed as three principals in this investigation. Results reveal that the strengths of Open innovation platform action are (1) integrated modularized manufacturing ability; (2) Align core competence with customer; (3) setup value chain and alliance to build robust platform; (4) cost-effective customized products and design support. The findings were summarized as the following statements, the business strategy encompasses three dimensions: Interoperable design platform, core technology competence strengthening, and partnership and complementary establishment. The entire advanced open innovation system can be conveyed to emerging markets successfully. Driving process-design co-optimization to assure TSMC’s leadership in technology, and reducing design barriers for customer to adopt TSMC technology, design ecosystem is the platform for TSMC to actively engage the design ecosystem. This leverage TSMC superior ROI through design collaboration model, and has been proven to enable customers to achieve silicon success by synergizing the innovations TSMC & partners
en
dc.description.provenanceMade available in DSpace on 2021-06-15T11:11:23Z (GMT). No. of bitstreams: 1
ntu-105-P02546017-1.pdf: 2769804 bytes, checksum: be18ef82ddb48cc3d0e98a919609c4cb (MD5)
Previous issue date: 2016
en
dc.description.tableofcontents中文摘要 III
ABSTRACT V
目錄 VIII
圖目錄 X
表目錄 XI
第一章 緒論 1
1.1 研究背景與動機 1
1.2 研究動機 7
1.3 研究目的 16
1.4 研究方法 17
第二章 文獻回顧 21
2.1建立進入障礙的理論 21
2.2協同合作動機及其構面 29
第三章 產業代工及IC設計平台優勢策略分析 33
3.1個案公司簡介/歷程/沿革/營業方式 33
3.2 設計服務與晶圓代工廠合作設計平台 37
3.3 晶圓廠建立內部設計平台 47
3.4 特定新應用需要的設計平台 49
3.5 設計生態平台的合作範圍及模式 53
3.6 優劣勢分析(SWOT分析) 54
3.7 SWOT策略分析主要面向 58
3.8進入障礙的影響因素 62
第四章 結論與未來研究方向 69
4.1結論 69
4.2未來研究方向 71
參考文獻 72
dc.language.isozh-TW
dc.title晶圓代工廠經營及設計平台之策略-以台灣積體電路公司為例zh_TW
dc.titleA Study on the Collaboration between Foundry and IC Design House from Open Innovation Platform: A Case Study of TSMCen
dc.typeThesis
dc.date.schoolyear104-2
dc.description.degree碩士
dc.contributor.oralexamcommittee黃奎隆,陳文智,藍俊宏
dc.subject.keywordIC設計服務,電子設計自動化(EDA),射頻設計套件(RDK),開放創新平台(OIP),鰭式場效電晶體 (FINFET),zh_TW
dc.subject.keywordDesign Ecosystem Integrated Circuit Design,Electronic Design Automation,Package Design Kits,Open Innovation Platform,Fin Field Effect Transistor,en
dc.relation.page75
dc.identifier.doi10.6342/NTU201603544
dc.rights.note有償授權
dc.date.accepted2016-08-23
dc.contributor.author-college工學院zh_TW
dc.contributor.author-dept工業工程學研究所zh_TW
顯示於系所單位:工業工程學研究所

文件中的檔案:
檔案 大小格式 
ntu-105-1.pdf
  目前未授權公開取用
2.7 MBAdobe PDF
顯示文件簡單紀錄


系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。

社群連結
聯絡資訊
10617臺北市大安區羅斯福路四段1號
No.1 Sec.4, Roosevelt Rd., Taipei, Taiwan, R.O.C. 106
Tel: (02)33662353
Email: ntuetds@ntu.edu.tw
意見箱
相關連結
館藏目錄
國內圖書館整合查詢 MetaCat
臺大學術典藏 NTU Scholars
臺大圖書館數位典藏館
本站聲明
© NTU Library All Rights Reserved