請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48269完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 洪士灝(Shih-Hao Hung) | |
| dc.contributor.author | Wei-Ting Chou | en |
| dc.contributor.author | 周威廷 | zh_TW |
| dc.date.accessioned | 2021-06-15T06:50:46Z | - |
| dc.date.available | 2016-02-25 | |
| dc.date.copyright | 2011-02-25 | |
| dc.date.issued | 2011 | |
| dc.date.submitted | 2011-02-15 | |
| dc.identifier.citation | [1] MPI over In niBand Project. http://mvapich.cse.ohio-state.edu/.
[2] MPICH-MX Software. http://www.myri.com/scs/download-mpichmx.html. [3] MPICH2. http://www.mcs.anl.gov/mpi/. [4] Texas Instruments. www.ti.com. [5] The Multicore Association. http://www.multicore-association.org/home. php. [6] Adnan Agbaria, Dong-In Kang, and Karandeep Singh. Lmpi: Mpi for hetero- geneous embedded distributed systems. In Parallel and Distributed Systems, 2006. ICPADS 2006. 12th International Conference on, volume 1, page 8 pp., July 2006. [7] E. Beigne, F. Clermidy, P. Vivet, A. Clouard, and M. Renaudin. An asyn- chronous noc architecture providing low latency service and its multi-level de- sign framework. In Asynchronous Circuits and Systems, 2005. ASYNC 2005. Proceedings. 11th IEEE International Symposium on, pages 54 - 63, 2005. [8] Lei Chai, Albert Hartono, and Dhabaleswar K. Panda. Designing high per- formance and scalable mpi intra-node communication support for clusters. In Cluster Computing, 2006 IEEE International Conference on, pages 1 -10, 2006. [9] I-Yao Chuang, Chi-Wen Chang, Tso-Yi Fan, Jen-Chieh Yeh, Kung-Ming Ji, Jui-Liang Ma, An-Yeu Wu, and Shih-Yin Lin. Pac duo soc performance anal- ysis with esl design methodology. In ASIC, 2009. ASICON '09. IEEE 8th International Conference on, pages 399 -402, 2009. [10] L. Dagum and R. Menon. Openmp: an industry standard api for shared- memory programming. Computational Science Engineering, IEEE, 5(1):46 -55, 1998. [11] David Geer. Industry trends: Chip makers turn to multicore processors. Com- puter, 38:11-13, May 2005. [12] Al Geist, Al Geist Ornl, William Saphir Nas, and Tony Skjellum. Mpi-2: Ex- tending the message-passing interface, 1996. [13] William Gropp, Ewing Lusk, Nathan Doss, and Anthony Skjellum. A high- performance, portable implementation of the mpi message passing interface standard. Parallel Comput., 22:789-828, September 1996. [14] Kun-Yuan Hsieh, Yen-Chih Liu, Po-Wen Wu, Shou-Wei Chang, and Jenq Kuen Lee. Enabling streaming remoting on embedded dual-core processors. In Par- allel Processing, 2008. ICPP '08. 37th International Conference on, pages 35 -42, 2008. [15] Shih-Hao Hung, Chia-Heng Tu, and Wen-Long Yang. A portable, e cient inter-core communication scheme for embedded multicore platforms. Journal of Systems Architecture, 57(2):193 - 205, 2011. [16] Shih-Hao Hung,Wen-Long Yang, and Chia-Heng Tu. Designing and implement- ing a portable, e cient inter-core communication scheme for embedded multi- core platforms. In Proceedings of the 2010 IEEE 16th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA '10, pages 303-308, Washington, DC, USA, 2010. IEEE Computer Society. [17] Yu-Hsien Lin, Chiaheng Tu, Chi-Sheng Shih, and Shih-Hao Hung. Zero-bu er inter-core process communication protocol for heterogeneous multi-core plat- forms. Real-Time Computing Systems and Applications, International Work- shop on, 0:69-78, 2009. [18] Daniel L. Ly, Manuel Saldana, and Paul Chow. The challenges of using an embedded mpi for hardware-based processing nodes. In Field-Programmable Technology, 2009. FPT 2009. International Conference on, pages 120 -127, 2009. [19] Ozcan Ozturk, Mahmut Taylan Kandemir, Guilin Chen, Mary Jane Irwin, and Mustafa Karakoy. Customized on-chip memories for embedded chip multipro- cessors. In Proceedings of the 2005 Asia and South Paci c Design Automation Conference, ASP-DAC '05, pages 743-748, New York, NY, USA, 2005. ACM. [20] Scott Pakin. Receiver-initiated message passing over rdma networks. In Parallel and Distributed Processing, 2008. IPDPS 2008. IEEE International Symposium on, pages 1 -12, 2008. [21] Pat Huang. Lock-free Queue and Ring Bu er. http://code.google.com/p/ effo/downloads/detail?name=EffoDesign_LockFree.pdf, 2009. [22] Marjorie A. Zielke, Monica J. Evans, Frank Dufour, Timothy V. Christopher, Jumanne K. Donahue, Phillip Johnson, Erin B. Jennings, Brent S. Friedman, Phonesury L. Ounekeo, and Ricardo Flores. Serious games for immersive cul- tural training: Creating a living world. IEEE Computer Graphics and Appli- cations, 29:49-60, 2009. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/48269 | - |
| dc.description.abstract | 嵌入式系統的發展在最近幾年慢慢趨向多核心化,隨之而來的問題是軟體的開發、整合和移植越來越困難,而其中重要的問題之一是太多樣化的核心間溝通模式。對於軟體開發人員而言,若有一個標準的、高移植性、具延展性且有效率的核心間溝通機制,可大幅降低多核心程式開發的時程及難度。為此我們提出一套方案叫做MSG的核心間溝通函式庫,採用分層化的設計,將平台與不相依的部份從函式庫中隔分開,因此只要重做少部分的函式就能移植到新平台上。我們加入了緩衝區池以及服務處理器的設計,讓MSG在系統核心增多時,記憶體使用量不致於爆增。我們利用工研院PAC Duo平台來實驗與評估MSG的設計,在該平台上我們展現如何利用MSG的小量訊息傳輸方案以及有系統的最佳化策略來提高溝通效能。另外我們也在三個不同架構的多核心平台上展示了MSG的移植性,分別是IBM Cell,PAC Duo以及x86。最後希望我們的經驗對於現在或未來在核心間溝通函式庫的設計及開發上有實質的幫助。 | zh_TW |
| dc.description.abstract | The multi-core architecture is the trend of current embedded system design in recent years, but the software development, integration, and migration have become more and more difficult. The major reason of this problem is the diversified inter-core communication mechanisms. A unified, portable, scalable, and efficient inter-core communication scheme should help reduce these difficulties significantly. We proposed a scheme called MSG, which aimed to achieve those requirements. It employs a layered design to separate the platform dependent and platform independent part in our library to minimize the porting efforts. Our Buffer Pool and Service Processor designs aim to limit the growth of memory usage on many-core systems. We experimented and evaluated our design methodology with case study on the ITRI PAC Duo platform. With the design of small messages communication schemes and systematic optimization strategies, we showed how optimizations could be done to improve the performance of the MSG library. Furthermore, we illustrated the portability on three different kind of multi-core platforms: IBM Cell, PAC Duo, and x86. Hopefully, our experiences help the design and development of communication libraries for exiting and future multi-core platforms. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T06:50:46Z (GMT). No. of bitstreams: 1 ntu-100-R97922138-1.pdf: 3264953 bytes, checksum: 2ca674e193d69dd42742c13ad5a3e1f5 (MD5) Previous issue date: 2011 | en |
| dc.description.tableofcontents | Acknowledgements i
Abstract(Chinese) ii Abstract iii List of Tables vii List of Figures viii 1 Introduction 1 2 Background and Related Works 4 2.1 Heterogeneous Multi-core Platforms . . . . . . . . . . . . . . . . . . . 4 2.2 Inter-core Communications in Heterogeneous Multi-core Platforms . . 5 2.3 Overview of PAC Duo Platform . . . . . . . . . . . . . . . . . . . . . 7 2.4 Programming Frameworks on PAC Duo Platform . . . . . . . . . . . 8 2.4.1 P2DK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4.2 Streaming RPC . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 Related Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Design of Inter-core Communication Schemes 13 3.1 Overview of MSG Library . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 Communication Scheme Design . . . . . . . . . . . . . . . . . . . . . 16 3.2.1 Managing the Inter-core Communication Bu ers . . . . . . . . 18 3.2.2 Design of the Control Protocol . . . . . . . . . . . . . . . . . . 25 3.3 Performance Considerations . . . . . . . . . . . . . . . . . . . . . . . 30 4 Implementation of MSG Library 33 4.1 Implementation on PAC Duo . . . . . . . . . . . . . . . . . . . . . . 33 4.2 Optimization Strategies with Using Hardware Features . . . . . . . . 34 4.3 Cache Coherency Analysis . . . . . . . . . . . . . . . . . . . . . . . . 36 5 Evaluation 39 5.1 Portability of MSG Library . . . . . . . . . . . . . . . . . . . . . . . 39 5.1.1 Porting Experience on the IBM Cell Platform . . . . . . . . . 40 5.1.2 Porting Experience on the PAC Duo Platform . . . . . . . . . 42 5.1.3 Porting Experience on the x86 Platform . . . . . . . . . . . . 43 5.2 Performance of MSG library on the PAC Duo Platform . . . . . . . . 44 5.2.1 Performance Results: MPU-DSP Communication in MSG Li- brary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 5.2.2 Performance Results: DSP-DSP Communication in MSG Li- brary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 5.2.3 Memory Footprint Analysis of MSG Library . . . . . . . . . . 49 5.2.4 Case Study of Application: SSL Encryption and Decryption . 49 6 Conclusions and Future Works 54 Bibliography 56 | |
| dc.language.iso | en | |
| dc.subject | 訊息傳遞 | zh_TW |
| dc.subject | 嵌入式系統 | zh_TW |
| dc.subject | 異質多核心 | zh_TW |
| dc.subject | 效能 | zh_TW |
| dc.subject | 移植性 | zh_TW |
| dc.subject | 延展性 | zh_TW |
| dc.subject | 核心間溝通 | zh_TW |
| dc.subject | 協定 | zh_TW |
| dc.subject | scalable | en |
| dc.subject | message passing | en |
| dc.subject | protocol | en |
| dc.subject | inter-core communication | en |
| dc.subject | embedded systems | en |
| dc.subject | heterogeneous multi-core | en |
| dc.subject | efficient | en |
| dc.subject | portable | en |
| dc.title | 在嵌入式多核心平台上設計並實作具移植性的高效能核心間溝通函式庫 | zh_TW |
| dc.title | Designing and Implementing a Portable, Efficient Inter-core Communication Scheme for Embedded Multi-core Platforms | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 99-1 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 郭大維(Tei-Wei Kuo),施吉昇(Chi-Sheng Shih),簡韶逸(Shao-Yi Chien) | |
| dc.subject.keyword | 嵌入式系統,異質多核心,效能,移植性,延展性,核心間溝通,協定,訊息傳遞, | zh_TW |
| dc.subject.keyword | embedded systems,heterogeneous multi-core,efficient,portable,scalable,inter-core communication,protocol,message passing, | en |
| dc.relation.page | 59 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2011-02-16 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 資訊工程學研究所 | zh_TW |
| 顯示於系所單位： | 資訊工程學系 | |
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