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  1. NTU Theses and Dissertations Repository
  2. 電機資訊學院
  3. 光電工程學研究所
請用此 Handle URI 來引用此文件: http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/4814
完整後設資料紀錄
DC 欄位值語言
dc.contributor.advisor王倫(Lon A. Wang)
dc.contributor.authorXiang Fangen
dc.contributor.author方向zh_TW
dc.date.accessioned2021-05-14T17:47:52Z-
dc.date.available2018-03-13
dc.date.available2021-05-14T17:47:52Z-
dc.date.copyright2015-03-13
dc.date.issued2015
dc.date.submitted2015-02-11
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dc.identifier.urihttp://tdr.lib.ntu.edu.tw/jspui/handle/123456789/4814-
dc.description.abstract近年來,各種軟性電子元件的發展逐漸成熟,其中具有低成本、大面積量產能力等優點的液態製程有機電晶體其潛力更是突出。本論文研究主題是參與交通大學冉曉雯教授、孟心飛教授所組成的共同合作團隊之研究項目,針對空間電荷限制的有機垂直電晶體進行改進。過去這個團隊雖然可以製作出同時具有高輸出電流、高開關電流比與低操作偏壓等良好特性的有機垂直電晶體,但元件電性常常受限於製程方式,例如利用非緊密排列的奈米球作為金屬基極蒸鍍遮罩時,容易因為奈米球的隨機排列,造成球聚集而產生孔洞過大的問題。研究結果顯示,過大的電子傳輸通道將會產生較大的漏電流。
為解決這一個棘手問題,本實驗室以干涉曝光微影術結合奈米壓印術,成功製作出規則金屬網基極。
但是干涉曝光之解析度受限於光源波長,無法製作出小於一百奈米之網格圖案;而濕式蝕刻在製作規則金屬網的同時,則會對元件上造成有機材料的離子汙染,而產生漏電流。本研究首先引進原子層沉積製程,在縮小孔洞直徑的同時加強光阻結構之機械強度。而後為了將濕式蝕刻從製程中去除,改以奈米壓印搭配剝離法來製作奈米金屬網,因此有了突破性的成果,成功製作出大面積(大於四平方公分)、直徑小於一百奈米的金屬網格,並成功將電晶體基極漏電流縮小近一個數量級,同時具備高製程容忍度與高再現性,製作出元件具有開電流4.64 mA/cm2及開關電流比到105以上的元件特性。
zh_TW
dc.description.abstractOwing to the rapid development of flexible electronic devices in recent years, the solution-processed organic transistors have shown their great potential in many applications by employing low-cost, roll-to-roll, and large-area mass production. This thesis mainly focuses on the performance improvement on space-charge-limited organic transistor (SCLT), jointly developed by Prof. Zan’s, Prof. Meng’s and our groups. Though SCLT usually has high output current, high ON/OFF current ratio and relatively low operational voltage, its performance is still unstable due to the defects in fabrication process. The nano sphere is used as an evaporation mask for base-electrode in the colloidal lithographic process. But accommodation effect may occur because of the random arrangement of spheres. It may produce larger hole on the electrode, causing larger leakage current of SCLT. To solve this problem, we fabricate the well-regular-ordered metal mesh base-electrode by combing interference lithography (IL) and nanoimprint.
Since the resolution of IL is limited by the wavelength of light source, sub-100 nm metal mesh cannot be realized. In addition, the ion contamination caused by wet-etching may induce large base leakage current. We therefore introduce the atomic layer deposition process to reduce the hole diameter of photoresist pattern down to smaller than 100 nm. And the mechanical strength of photoresist structure also has been reinforced to be hard enough as an imprint mold at the same time. Then we adopt the strip-off method to replace wet-etching method in mesh fabrication. We successfully combine nanoimprint with strip-off method to fabricate large area (> 4 cm2) and sub-100 nm resolution metal mesh. The base leakage current has been reduced by nearly an order of magnitude. And the process tolerance and reproducibility of SCLT remain high at the same time. The output current of SCLT device reaches 4.64 mA/cm2 and the ON/OFF current ratio increases to more than 105, setting a new milestone on the road of SCLT development.
en
dc.description.provenanceMade available in DSpace on 2021-05-14T17:47:52Z (GMT). No. of bitstreams: 1
ntu-104-R01941091-1.pdf: 9109839 bytes, checksum: ce8c48a34b9a92e733dea63facc6876a (MD5)
Previous issue date: 2015
en
dc.description.tableofcontents誌謝 i
中文摘要 iii
ABSTRACT iv
Statement of Contributions vi
CONTENTS viii
LIST OF FIGURES ix
LIST OF TABLES xiii
Chapter 1 Motivation and Introduction 1
1-1 Motivation 1
1-2 Space-charge-limited transistors…………………………………………….3
1-3 Organization of the Thesis 8
Chapter 2 Fabrication of Imprinted SCLT 9
2-1 Nanoimprint Lithography 9
2-2 Two-beam interference lithography………………………………………..12
2-2-1 IL concept 12
2-2-2 ARC thickness design. 16
2-2-3 Exposure dose of photoresist pattern 19
2-3 Fabrication processes of imprinted SCLT 23
Chapter 3 Sub-100 nm ALD-assisted Nanoimprint Lithography 28
3-1 ALD-assisted dimension shrinkage 28
3-2 Hot-embossing imprint process 36
3-2-1 Fabrication of h-PDMS imprint stamp……………………………36
3-2-2 Mold release agent………………………………………………...39
3-3 Fabrication of Al nano meshes by wet-etching 41
3.4 Measurement results 44
Chapter 4 Fabrication of Nano Metal Meshes by Strip-off Method 48
4-1 Advantages of lift-off method 48
4-2 Dissolvable imprint resist 50
4-3 Patterning the microfiber by imprinting 53
4-4 Fabrication process of lift-off method 56
4-4-1 Problems of lift-off method……………………………………….56
4-4-2 Tilted evaporation of SiO caps……………………………………61
4-4-3 Strip-off method…………………………………………………..64
4-5 Measurement results 68
4-5-1 Leakage current at PVP-Al interface……………………………...68
4-5-2 Strip-off method without residue removal………………………...72
Chapter 5 Applications of Nano Metal Structures Using Strip-off method.. 78
5-1 Nano metal gratings for optical applications 78
5-2 Nano metal structures for electronic devices 83
5-3 Nano metal structures for sensing devices 86
Chapter 6 Conclusions and Future Works 87
6-1 Conclusions 87
6-2 Future works 89
References……………………………………………………………………………...92
dc.language.isoen
dc.title以奈米壓印術製作應用於有機電子元件之奈米金屬網格zh_TW
dc.titleFabrication of Nano Metal Meshes by Nanoimprint Lithography for Organic Electronics Device Applicationsen
dc.typeThesis
dc.date.schoolyear103-1
dc.description.degree碩士
dc.contributor.oralexamcommittee孟心飛(Hsin-Fei Meng),冉曉雯(Hsiao-Wen Zan),劉致為(Chee-Wee Liu)
dc.subject.keyword干涉微影,奈米壓印,原子層沉積,有機電晶體,空間電荷限制電晶體,zh_TW
dc.subject.keywordinterference lithography,nanoimprint,ALD,organic transistor,space-charge-limited transistor,en
dc.relation.page98
dc.rights.note同意授權(全球公開)
dc.date.accepted2015-02-12
dc.contributor.author-college電機資訊學院zh_TW
dc.contributor.author-dept光電工程學研究所zh_TW
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