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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47602完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王暉(Huei Wang) | |
| dc.contributor.author | Chi-Cheng Hung | en |
| dc.contributor.author | 洪其正 | zh_TW |
| dc.date.accessioned | 2021-06-15T06:08:06Z | - |
| dc.date.available | 2013-08-18 | |
| dc.date.copyright | 2010-08-18 | |
| dc.date.issued | 2010 | |
| dc.date.submitted | 2010-08-13 | |
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[48] “Sonnet User’s Manual, Release 11.52,” Sonnet Software, Inc, 2007. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47602 | - |
| dc.description.abstract | 本論文分成兩大部分。第一部分是功率放大器的設計，首先介紹功率放大器的原理，以及設計上的考量。若干功率結合的方式以及發展也將呈現於該部分。第三章中，將呈現一個K頻段的功率放大器，利用台積電之0.18微米之金氧半場效電晶體製程實現。在設計上，針對電晶體進行適當之選擇，接著針對已選取的元件，利用電感共振電晶體寄生電容，並採用薄膜微帶傳輸線以達成功率匹配和功率結合。經量測顯示，該電路在20 GHz可產生22.5 dB的小信號增益，並且飽和輸出功率可達20.1 dBm。該電路模擬與量測之誤差討論也在此詳述。
第二部分是倍頻器的設計。一開始將介紹倍頻器的基本概念，主要以被動之倍頻器為主。首先針對系統上的應用考量做一說明，接下來針對位於智利之阿伽瑪大型毫米波/次毫米波望遠鏡(ALMA)計畫之本地振盪源驅動模組做介紹，並說明倍頻電路在該系統中的作用。 第五章首先介紹一個使用於上述天文觀測系統中的六倍頻器架構以及其設計上的主要考量。。該架構包含一被動之二倍頻器，緩衝放大器，以及被動之三倍頻器，接下來呈現兩個六倍頻器電路。第一個電路以穩懋之變晶高電子遷移率場效電晶體(mHEMT)製程實現，係與本實驗室其他成員合作的結果。該電路的設計細節和量測結果皆在此呈現。因為大信號模型的不確定性，該電路表現較不如預期，在14.5 dBm之輸入功率下，於72-114 GHz有大於-22.9 dB之轉換增益，其諧波抑制大於40 dB。 最後則利用前述六倍頻器的架構，改善該六倍頻器的轉換增益。此改善針對了三倍頻器之輸出濾波器進行改善，並將二極體的阻抗匹配重新設計，以及利用準確之元件模型改善緩衝放大器，於穩懋之假型高電子遷移率場效電晶體(pHEMT)製程下實現之。量測結果顯示，該電路在72-117 GHz在10 dBm之輸入功率下，皆有-13.5 dB以上之轉換增益，同時擁有24 dB以上之諧波項抑制。 | zh_TW |
| dc.description.abstract | This thesis consists of two parts. The first part is CMOS power amplifiers. Chapter 2 introduces the power amplifier theories. In chapter 3, a K-band CMOS power amplifier is designed using 3-stages cascode topology. The power stage is combined with two power cells. With appropriate device selection and matching, the power amplifier is measured with 22.5-dB of gain and 20.1-dBm of output power, provides good performance in K-band. Some inconsistent between simulation and measurement are observed, and could be corrected by proper simulation setup.
The second part is the frequency multipliers. Chapter 4 introduces the design concepts of the frequency multipliers. In chapter 5, two sixtuplers consist of doublers, buffer amplifiers, and triplers, are introduced; moreover, both of the two circuits are critical parts for assembling the ALMA’s LO driver modules. The first sixtupler was fabricated in mHEMT process, which was in co-operation with other members in our lab. Due to lack of the large-signal parameters of the device, the circuit performs over -22.9 dB of conversion gain under 14.5 dBm of input power, as well as harmonic rejection better than 40 dB from 72-114 GHz. The second sixtupler is implemented in pHEMT process. The improvements of building blocks, as well as accurate large-signal model contribute to a significant improvement to the performance. The second circuit measured with > -13.5 dB of conversion gain when driving 10 dBm of input power from 72-117 GHz. The harmonic rejection is better than 24 dB. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T06:08:06Z (GMT). No. of bitstreams: 1 ntu-99-R97942006-1.pdf: 5415509 bytes, checksum: bede91f4e812b3340206182710065c98 (MD5) Previous issue date: 2010 | en |
| dc.description.tableofcontents | 口試委員會審定書 #
誌謝 i 中文摘要 iii ABSTRACT iv CONTENTS v LIST OF FIGURES viii LIST OF TABLES xiv Chapter 1 Introduction 1 1.1 Background and Motivation 1 1.2 Literature Survey 3 1.2.1 CMOS Power Amplifiers 3 1.2.2 W-band Sixtuplers 5 1.3 Contributions 6 1.4 Thesis Organization 7 Chapter 2 Fundamentals of Power Amplifiers 8 2.1 Linear Amplifier Theory [20]-[23] 8 2.2 Power Amplifiers [24]-[31] 11 2.2.1 Power Amplifier Basics 11 2.2.2 Linearity 16 2.3 Power Combining 18 2.3.1 Combining of Power Cells [27] [28] 19 2.3.2 Distributed Active Transformer (DAT) [29]-[31] 20 Chapter 3 Design of a K-Band Power Amplifier in 0.18-μm CMOS Process 21 3.1 Introduction 21 3.2 Circuit Design 22 3.2.1 Process Overview 22 3.2.2 Circuit Design 22 3.2.3 Stability Consideration 26 3.2.4 Layout Consideration 29 3.3 Simulated and Measured Results 33 3.4 Discussions 37 3.5 Summary 44 Chapter 4 Frequency Multipliers Overview 46 4.1 Introduction to the LO driver in ALMA Project 46 4.1.1 Overview of the ALMA Project 46 4.1.2 Building Blocks of the LO Driver 47 4.2 Frequency Multipliers Fundamentals [35]-[37] 48 4.2.1 Structure of a Frequency Multiplier 48 4.2.2 Non-linear Signal Source 49 4.3 Passive Doublers and Triplers 50 4.3.1 Passive Doublers [18],[36] 50 4.3.2 Passive Triplers [17], [19] 53 Chapter 5 Design of 72-114 GHz Sixtuplers in HEMT Process 56 5.1 System Architecture 56 5.2 Design Procedure of the Sixtupler 57 5.2.1 System Blocks 57 5.2.2 Building Blocks Overview 58 5.3 A 72-114 GHz Sixtupler in 0.15-μm mHEMT Process 64 5.3.1 Process Overview 64 5.3.2 Design of the Building Blocks 65 5.3.3 Simulation and Measurement 72 5.3.4 Discussions 76 5.3.5 Conclusions 80 5.4 Redesign of the 72-114 GHz Sixtupler in 0.15-μm pHEMT Process 80 5.4.1 Process Overview 80 5.4.2 Re-Design of the Building Blocks 82 5.4.3 Simulated and Measured Results 90 5.4.4 Discussions 92 5.4.5 Conclusions 100 5.5 Summary 100 Chapter 6 Conclusions 102 REFERENCE 103 | |
| dc.language.iso | en | |
| dc.title | 微波及毫米波功率放大器與倍頻器之研究 | zh_TW |
| dc.title | Research of Microwave and Millimeter-wave Power Amplifiers and Frequency Multipliers | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 98-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 林坤佑(Kun-You Lin),章朝盛(Chau-Ching Chiong),邱煥凱(Hwann-Kaeo Chiou) | |
| dc.subject.keyword | 功率放大器,金氧半場效電晶體,微波單晶積體電路,功率結合,倍頻器,高電子遷移率場效電晶體,ALMA, | zh_TW |
| dc.subject.keyword | MMIC,Power amplifiers,Power combining,CMOS,Multiplier,ALMA,mHEMT,pHEMT, | en |
| dc.relation.page | 107 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2010-08-15 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電信工程學研究所 | zh_TW |
| 顯示於系所單位： | 電信工程學研究所 | |
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