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標題: | 氧化鋅薄膜電晶體穩定性分析與探討 A Comprehensive Study of the Mechanism of the Bias Temperature Instability on Zinc Oxide Thin Film Transistors |
作者: | Liang-Yu Su 蘇亮宇 |
指導教授: | 黃建璋(JuanJang, Huang) |
關鍵字: | 薄膜電晶體,氧化鋅,穩定性, Thin-film transistor,Zinc Oxide,Stability,Stretched-exponential, |
出版年 : | 2010 |
學位: | 碩士 |
摘要: | 薄膜電晶體長久以來在平面顯示技術扮演重要角色,隨著技術的成熟,顯示器將往更大尺寸、更高畫質的方向發展,傳統的非晶矽薄膜電晶體由於載子遷移率的限制,將無法驅動下一世代的平面顯示器,此外,有機發光二極體由於具有高對比、廣視角…等等好處,未來將有極高機會取代傳統的液晶顯示技術,但由於非晶矽薄膜電晶體在長時間工作之後,其不穩定效應將導致工作電流下降,這將導致顯示器亮度逐漸下降,為商品化的一大挑戰。
氧化鋅具備較非晶矽更高的載子遷移率,且製程可完全相容於傳統非晶矽薄膜電晶體,具備大面積、低成本的製作能力,在這篇論文中,為了提高氧化鋅薄膜電晶體工作電流,我們提出了一種通道局部高參雜的新結構,由理論的計算證實可經由調整通道參雜結構控制元件的臨界電壓,在進一步的實驗中我們製作出了這樣的元件 ,在閘極電壓5伏特,汲極電壓14伏特時,其工作電流高達3.2mA,證實此種結構可提供較傳統的氧化鋅及氧化鋅鎵元件高出許多的工作電流。 由於以往的製程步驟重複性不高,我們更改了光罩的設計,利用電漿輔助化學氣相沉積均勻的沉積絕緣層,有效的抑制住漏電流,並使同尺寸元件的特性均一,此外更改善了以往電流不易飽和以及凸起(over-shoot)等現象,為了更進一步的提升元件穩定性,我們嘗試了不同氧化鋅薄膜沉積溫度、退火溫度,成功的將元件的開關比提升到大於10的9次方,由於氧化物半導體易受外界環境影響,我們也提出了一套保護層的選取法則,並成功利用濺鍍的方式,將沉積保護層對元件臨界電壓的影響成功抑制到1伏特。 在最後,我們利用過去得到最穩定的製程,製作並比較不同退火時間下元件在閘極偏壓之下的穩定性,並導入Stertched-Exponential Time Dependence定量的萃取出元件的生命期,並更進一步的將生命期最長(1.26x106s)的元件在變溫下作穩定性測驗,成功的萃取出元件的活化能 (0.57eV),利用萃取的這些參數客觀的比較過去文獻,我們製作的氧化鋅薄膜電晶體有過人的穩定性 Thin films transistors has long been the workhorse in the active-matrix liquid crystal display (AM-LCD) industry. In the future development, the displays will expand to larger size and higher resolution. Due to the nature restriction of the mobility, amorphous silicon thin film transistors are incapable of driving next generation flat panel displays. Besides, organic light emitting diode displays have the advantages of high contrast ratio and wide view angle. It is likely to replace the traditional liquid crystal displays. But owing to the instability mechanism of a-Si TFTs, the working current will decrease after a prolong operating. This will cause the brightness of OLED displays degrade and being a challenge for commercialization. ZnO has larger carrier mobility than amorphous silicon. The fabrication process of ZnO TFTs is compatible to traditional a-Si TFTs, which posses the ability of fabrication in large area with low cost. In this thesis, in order to improve the output current of ZnO TFTs, we proposed a new structure with a delta-doped channel layer. From theoretical model, this structure allows us to adjust the threshold voltage by varying the composition of the delta-doped layer. In the further experiment, we successfully fabricated the device with working current reaching 3.2mA under VGS=5Vand VDS=14V. This proves that this structure can provide a higher current than conventional ZnO and GZO TFTs. In order to improve process reliability, we redesign the fabrication process. Plasma enhanced chemical vapor deposition (PECVD) can deposit uniform film in large area. This will contribute to maintain identical electrical performance for the devices with the same size. Furthermore, it restrains the leakage current. The unsaturated and over-shoot phenomena are not observed anymore. In order to improve the device stability, we deposited and annealed the ZnO film in various temperatures. The on-off ratio is increased to larger than 109. Since oxide semiconductor is sensitive to ambient configuration, we proposed a guide line for choosing passivation. The threshold voltage shift after depositing passivation is reduced to 1V. At last, we compared three samples with various post ZnO growth annealing durations. We compared the stability through a constant gate bias stress. A stretch-exponential time dependence was introduced and was utilized to extracted the characteristic trapping time (τ). A further stress test under different temperature was carried out on the device with longest τ (1.26x106s). An average effective energy barrier (Eτ) was extracted (0.57eV). Comparing those parameter with literature, we successful fabricated ZnO TFTs with high stability. |
URI: | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/47351 |
全文授權: | 有償授權 |
顯示於系所單位: | 光電工程學研究所 |
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