請用此 Handle URI 來引用此文件：
http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44704完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 邱奕鵬(Yih-Peng Chiou) | |
| dc.contributor.author | Yi-Min Yu | en |
| dc.contributor.author | 游逸民 | zh_TW |
| dc.date.accessioned | 2021-06-15T03:53:13Z | - |
| dc.date.issued | 2010 | |
| dc.date.submitted | 2010-07-05 | |
| dc.identifier.citation | 參考文獻
[1]International Technology Roadmap for Semiconductors. (http://www.itrs.net/) [2]R. Senthinathan and J. L. Prince,“Simultaneous Switching Ground Noise Calculation for Package CMOS Devices, ”IEEE J. Solid-State Circuit, vol. 26, no. 11, pp. 1724-1728, Nov. 1991. [3]G. T. Lei, R. W. Techentin, and B. K. Gilbert,“High-Frequency Characterization of Power/Ground-plane Structure, ”IEEE Trans. Microw. Theory Tech., vol. 47, no. 5, pp. 562-569, May 1999. [4]M. Swamination and A. E. Engin, Power Integrity Modeling and Design for Semiconductors and Systems, Prentice Hall, 2007. [5]T. H. Hubing, J. L. Drewniak, T. P Van Doren, and D. M. Hockanson,“Power Bus Decoupling on Multilayer Printed Circuit Boards,”IEEE Trans. Electromagn. Compat., vol. 37, no. 2, pp. 155-166, May 1995. [6]W. Cui, J. Fan, Y. Ren, H. Shi, J. L. Drewniak, and R. E. DuBroff,“DC Power-Bus Noise Isolation with Power-Plane Segmentation,”IEEE Trans. Electromagn. Compat., vol. 45, no. 2, pp. 436-443, May 2003. [7]T. Kamgaing, and O. M. Ramahi,“A Novel Power Plane with Integrated Simultaneous Switching Noise Mitigation Capability Using High Impedance Surface,”IEEE Microw. and Wireless Compn. Lett., vol. 13, no. 1, pp. 21-23, Jan. 2003. [8]R. Abhari, and G. V. Eleftheriades,“Metallo-Dielectric Electromagnetic Bandgap Structures for Suppression and Isolation of the Parallel-Plate Noise in High-Speed circuit,”IEEE Trans. Microw. Theory Tech., vol. 51, no. 6, pp. 1629-1639, Jun. 2003. [9]T.-L. Wu, Y.-H. Lin, T.-K. Wang, C.-C. Wang, and S.-T. Chen,“ Electromagnetic Bandgap Power/Ground Planes for Wideband Suppression of Ground Bounce Noise and Radiation Emission in High-Speed Circuits,”IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, pp. 2935-2942, Sep. 2005. [10]T.-L. Wu, Y.-H. Lin, and S.-T. Chen,“A Novel Power Plane With Super-Wideband Elimination of Ground Bounce Noise on High Speed Circuit,”IEEE Microw. Wireless Compon. Lett., vol. 15, no. 3, pp. 174-176, Mar. 2005. [11]S. Shahparnia and O. M. Ramahi, “Electromagnetic Interference(EMI) Reduction From Printed Circuit Boards (PCB) Using Electromagnetic Bandgap Structure, ”IEEE Trans. Electromagn. Compat, vol. 46, no.4, pp. 580-587, Nov. 2004. [12]T.-L. Wu and S.-T. Chen, “A Photonic Crystal Power/Ground Layer for Eliminating Simultaneously Switching Noise in High-Speed,”IEEE Trans. Microw. Theory Tech., vol. 54, no. 8, pp. 3398-3406, Aug. 2006. [13]T.-K. Wang, C.-Y. Hsieh, H.-H. Chuang, and T.-L. Wu,“Design and Modeling of a Stopband-Enhanced EBG Structure Using Ground Surface Perturbation Lattice for Power/Ground Noise Suppression,”IEEE Trans. Microw. Theory Tech., vol. 57, no. 8, pp. 2047-2054, Aug. 2009. [14]M.-S. Zhang, Y.-S. Li, L.-P. LI, and Chen Jia,“Super-Wideband SSN Supression in High-Speed Digital Communication Systems by Using Multi-Via Electromagnetic Bandgap Structure,”IEEE Communications Society subject matter expert for publication in the ICC 2007 proceedings. pp. 2648-2653. [15]Larry Smith, Raymond Anderson, Doig Forehand, Tanmony Roy,“Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology,”Sun Microsystems, Incorporation. [16]K.-B. Wu, A.-S. Liu, G.-H. Shiue, C.-M. Lin, R.-B. Wu,“Optimization for the Locations of Decoupling Capacitors in Suppressing the Ground Bounce by Genetic Algorithm,”Progress in Electromagnetics Research Sysmposium(PIERS), Hangzhou, China, Aug. 2005, pp. 22-26. [17]T.-L. Wu, S.-T. Chen, J.-N. Hwang and Y.-H. Lin,“Numerical and Experimental Investigation of Radiation Caused by the Switching Noise in the Partitioned DC Reference Planes of High Speed Digital PCB,”IEEE Trans. Electromagn. Compat., vol 46, no. 1, pp. 33-45, Feb. 2004. [18]High Frequency Structure Simulator, Ansoft Corporation (http://www.ansoft.com) [19]C.-L. Wang, G.-H. Shiue, W.-D. Guo, and R.-B. Wu,“A Systematic Design to Suppress Wideband Ground Bounce Noise in High-Speed Circuits by Electromagnetic-Bandgap-Enhanced Split Powers,”IEEE Trans. Microw. Theory Tech., vol.54, no. 12, pp. 4209-4217, Dec. 2006. [20]C.-L. Wang, G.-H. Shiue and R.-B. Wu,“EBG-Enhanced Split Power Planes for Wideband Noise Suppression,”Proc. IEEE 14th Topical Meeting Elect. Performance Electron. Packag., Oct. 2005, pp. 61-64, 24-26. [21] J. Lee, H. Kim and J. Kim,“High Dielectric Constant Thin Film EBG Power/Ground Network for Broad-band Suppression of SSN and Radiated Emission,”IEEE Microw. Wireless Compon. Lett., vol. 15, no. 8, pp. 505-507, Aug. 2005. [22]J. Park, A. C. W. Lu, K. M. Chua, L. L. Wai, J. Lee, and J. Kim,“Double-Stacked EBG Structure for Wideband Suppression of Simultaneous Switching Noise in LTCC-Based SiP Application,”IEEE Microw. Wireless Compon. Lett., vol. 16, no. 9, pp. 481-483, Sep. 2006. [23]K. H. Kim, and J. E. Schutt-Aine,“Analysis and Modeling of Hybrid Planar-Type Electromagnetic-Bandgap Structure and Feasibility Study on Power Distribution Network Application,”IEEE Trans. Microw. Theory Tech, vol. 56, no. 1,pp. 178-186, Jan. 2008. [24]D. M. Pozar, Microwave Engineering, 3rd ed. pp.372-374, New York：Wiley, 2005. [25]Q3D Extractor, Ansoft Corporation (http://www.ansoft.com) [26]Advanced Design System, Agilent EEs of EDA. [27]J. Kim and M. Swaminathan,“Modeling of Multilayered Power Distribution Planes Using Transmission Matrix Method ”IEEE Trans. Adv. Package., vol. 25, No. 2, pp. 189-199, May 2002. [28]C. R. Paul, Introduction to Electromagnetic Compatibility, John Wiley & Sons, Inc, 2006. [29]http://en.wikipedia.org/wiki/SMA_connector | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/44704 | - |
| dc.description.abstract | 有別於傳統式高阻抗平面電磁能隙結構是由一方型金屬板與單根連通柱接地而構成，多連通柱接地平面擾動晶格(multiple via ground surface perturbation lattice, MV-GSPL)與傳統式結構一樣均由週期性排列金屬板組成，但改為多根連通柱同時接地。此種電磁能隙結構可以提供較傳統式結構更寬頻的濾波效果來抑制同步切換雜訊在電源封裝系統中之傳遞。然而，本文除了說明MV-GSPL可以提供更寬的截止頻帶之外，更著重於藉由改變連通柱中心至金屬板邊之距離來探討截止頻帶的變化情形，並發現當連通柱擺放在最佳化的位置上時，會表現出最高的截止頻帶上緣與較好的比例頻寬，並依據本文的討論結果可以快速地尋找出這些最佳化的擺放位置。另外除了討論文獻上大多採用的方型金屬板結構外，本文亦加入圓型金屬板結構進行研究，更提出合理的解釋來說明當連通柱在某些位置上時，圓型金屬板結構在截止頻帶與比例頻寬的表現上會較方型金屬板來得佳。另外一個一維的等效電路模型也被提出，此模型可以用來快速預測截止頻帶的範圍，此等效電路的準確性也由實驗與模擬的結果進行驗證。 | zh_TW |
| dc.description.abstract | A multiple via ground surface perturbation lattice (MV-GSPL) is proposed to suppress the simultaneous switching noise (SSN) in the power distribution network (PDN). The MV-GSPL is formed by periodically embedded metal patches shorting to the ground plane with multiple via into the power/ground plane, and the stopband of MV-GSPL structure is much wider than the traditional mushroom type EBG. There are two types of MV-GSPL are discussed, including the square and circular patches. The thesis focuses on changing the distance between the center of via from the patch edge to enhance the stopband of MV-GSPL. According to the conclusion of this thesis, we can swiftly find the optimized via position of the MV-GSPL with the highest upper sideband frequency and best fractional bandwidth. An efficient 1-D equivalent circuit is also proposed to predict the stopband efficiently. The MV-GSPL structures are also fabricated on three layer FR4 printed circuit board (PCB) to demonstrate the good isolation performance and the measurement results are consistent with the simulation data. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T03:53:13Z (GMT). No. of bitstreams: 1 ntu-99-R97941085-1.pdf: 5996014 bytes, checksum: 5f88d976cffca629256f68d6da131869 (MD5) Previous issue date: 2010 | en |
| dc.description.tableofcontents | 目 錄
誌 謝……………………………………………I 中文摘要………………………………………II 英文摘要………………………………………III 目錄……………………………………………IV 圖表目錄………………………………………VI 第一章 簡介 1 1.1 研究動機………………………………………………1 1.2 高速電路中同步切換雜訊的成因……………………2 1.3 章節概要………………………………………………5 1.4 貢獻……………………………………………………6 第二章 文獻回顧 7 2.1 去耦合電容……………………………………………8 2.2 電源隔離島……………………………………………10 2.3 電磁能隙結構…………………………………………12 2.3.1 高阻抗平面電磁能隙結構………………………13 2.3.2 共平面式電磁能隙結構…………………………18 2.3.3 光子晶體電源層電磁能隙結構…………………21 第三章 多連通柱接地平面擾動晶格 25 3.1 多連通柱接地平面擾動晶格之設計概念……………25 3.2 一維等效電路模型之建立……………………………32 3.2.1 ABCD矩陣與週期性邊界條件……………………32 3.2.2 一維等效電路之推導……………………………37 3.3 連通柱位置變化對於頻帶之影響與討論……………48 3.4 與高阻抗平面電磁能隙結構之比較…………………55 第四章 幾何參數分析與實驗結果 63 4.1 幾何參數分析與討論…………………………………63 4.2 實作的結構參數與量測結果…………………………69 第五章 結論 77 參考文獻 78 | |
| dc.language.iso | zh-TW | |
| dc.subject | 接地彈跳雜訊 | zh_TW |
| dc.subject | 電源完整性 | zh_TW |
| dc.subject | 電磁能隙結構 | zh_TW |
| dc.subject | 多連通柱接地平面擾動晶格 | zh_TW |
| dc.subject | 同步切換雜訊 | zh_TW |
| dc.subject | electromagnetic bandgap | en |
| dc.subject | ground bounce noise | en |
| dc.subject | simultaneous switching noise | en |
| dc.subject | multiple via ground surface perturbation lattice | en |
| dc.subject | power integrity | en |
| dc.title | 利用多連通柱接地平面擾動晶格抑制同步切換雜訊之研究 | zh_TW |
| dc.title | Using Multiple Via Ground Surface Perturbation Lattice
for Suppression of Simultaneous Switching Noise | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 98-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.coadvisor | 吳宗霖(Tzong-Lin Wu) | |
| dc.contributor.oralexamcommittee | 盧信嘉(Hsin-Chia Lu),林怡成(Yi-Cheng Lin) | |
| dc.subject.keyword | 電源完整性,電磁能隙結構,多連通柱接地平面擾動晶格,同步切換雜訊,接地彈跳雜訊, | zh_TW |
| dc.subject.keyword | power integrity,electromagnetic bandgap,multiple via ground surface perturbation lattice,simultaneous switching noise,ground bounce noise, | en |
| dc.relation.page | 81 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2010-07-05 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 光電工程學研究所 | zh_TW |
| 顯示於系所單位： | 光電工程學研究所 | |
文件中的檔案：
| 檔案 | 大小 | 格式 | |
|---|---|---|---|
| ntu-99-1.pdf 未授權公開取用 | 5.86 MB | Adobe PDF |
系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。