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http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/43185完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.advisor | 王勝德 | |
| dc.contributor.author | Yen-Kai Wang | en |
| dc.contributor.author | 王彥凱 | zh_TW |
| dc.date.accessioned | 2021-06-15T01:41:25Z | - |
| dc.date.available | 2011-12-31 | |
| dc.date.copyright | 2009-07-20 | |
| dc.date.issued | 2008 | |
| dc.date.submitted | 2009-07-13 | |
| dc.identifier.citation | [1]SNORT official web site, http://www.snort.org/
[2] C.-L. Chang and S.-D. Wang, 'The design and implementation of a Perl compatible regular expression pattern matching engine with pipeline architecture using FPGAs,' 2008. [3] B. Joao, S. Ioannis, M. P. C. Joao, and V. Stamatis, 'Regular expression matching for reconfigurable packet inspection,' in Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on, 2006, pp. 119-126. [4] R. Sidhu and V. K. Prasanna, 'Fast Regular Expression Matching Using FPGAs,' in Field-Programmable Custom Computing Machines, 2001. FCCM '01. The 9th Annual IEEE Symposium on, 2001, pp. 227-238. [5] C. R. Clark and D. E. Schimmel, 'Scalable pattern matching for high speed networks,' in Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on, 2004, pp. 249-257. [6] R. W. Floyd and J. D. Ullman, 'The compilation of regular expressions into integrated circuits,' in Foundations of Computer Science, 1980., 21st Annual Symposium on, 1980, pp. 260-269. [7] M. Faezipour and M. Nourani, 'Constraint Repetition Inspection for Regular Expression on FPGA,' in High Performance Interconnects, 2008. HOTI '08. 16th IEEE Symposium on, 2008, pp. 111-118. [8] Z. K. Baker, J. Hong-Jip, and V. K. Prasanna, 'Regular Expression Software Deceleration for Intrusion Detection Systems,' in Field Programmable Logic and Applications, 2006. FPL '06. International Conference on, 2006, pp. 1-8. [9] P. Sutton, 'Partial character decoding for improved regular expression matching in FPGAs,' in Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on, 2004, pp. 25-32. [10] PCRE –Perl Compatible Regular Expression, “http://www.pcre.org/” [11] James, M., H. C. Young, et al. (2006). A Scalable Hybrid Regular Expression Pattern Matcher. Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on. [12]B. C. Brodie, R. K. Cytron, and D. E. Taylor, 'A Scalable Architecture For High-Throughput Regular-Expression Pattern Matching,' in Computer Architecture, 2006. ISCA '06. 33rd International Symposium on, 2006, pp. 191-202. [13] Clark, C.R. and Schimmel, D.E., “Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns,” in Proceedings of FPL 2003, LNCS 2778, pp 956-959, Sep. 2003. [14] J. Divyasree, H. Rajashekar, and K. Varghese, 'Dynamically reconfigurable regular expression matching architecture,' in Application-Specific Systems, Architectures and Processors, 2008. ASAP 2008. International Conference on, 2008, pp. 120-125. [15] A. Mitra, W. Najjar, and L. Bhuyan, 'Compiling PCRE to FPGA for accelerating SNORT IDS,' in Proceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems Orlando, Florida, USA: ACM, 2007. [16] N. Yamagaki, R. Sidhu, and S. Kamiya, 'High-speed regular expression matching engine using multi-character NFA,' in Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on, 2008, pp. 131-136. [17] Y.-H. E. Yang, W. Jiang, and V. K. Prasanna, 'Compact architecture for high-throughput regular expression matching on FPGA,' in Proceedings of the 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems San Jose, California: ACM, 2008. [18] L. Cheng-Hung, H. Chih-Tsun, J. Chang-Ping, and C. Shih-Chieh, 'Optimization of Pattern Matching Circuits for Regular Expression on FPGA,' Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 15, pp. 1303-1310, 2007. | |
| dc.identifier.uri | http://tdr.lib.ntu.edu.tw/jspui/handle/123456789/43185 | - |
| dc.description.abstract | 在入侵偵測系統中，正規表示法非常適合用來描述網路攻擊特徵。使用NFA架構硬體實作正規表式法，常會產生兩大問題，1.所佔用的硬體資料過大，2.不能新增新的rule的問題。
本篇論文著重於兩大問題的解決，對於硬體資料過大的問題，我們提出共用字串機制來解決，並改善其硬體架構，使其達到高速比對，最小化電路空間的設計。實驗結果顯示，我們的正規表示法樣式比對器，在Altera DE2上實作，速度可達到2.4 Gbps，且不影響速度情況下，可以使原設計架構有23.51%的空間改善(For snort 2.8)。 對於問題2對面不斷更新的樣式規則，我們也提出一種動態支援的比較器，以解決產品化後，未來要支援的新樣式規則。 | zh_TW |
| dc.description.abstract | Regular expressions are very suitable to describe the features of network attacks in an Intrusion Detection System (IDS). NFA-based hardware architectures might cause two problems. 1. NFA-based architectures occupy too much hardware area.2. NFA-based architecture can not add new rule dynamically.
This paper focus on these two issues .For the first one, we propose a string mechanism to improve the hardware area of NFA circuit. The experiment results of the proposed Regular Expression matching engine can scan the payload up to the rate of 2.4 Gbps, and have 23.51% space improvement (for the snort 2.8) For the second one, we also propose a matching architecture that can support dynamic updating of new rule sets.this comparator is going to support new rule in the future. | en |
| dc.description.provenance | Made available in DSpace on 2021-06-15T01:41:25Z (GMT). No. of bitstreams: 1 ntu-97-J96921013-1.pdf: 2374011 bytes, checksum: 8e78c247bfd6d328ba73b4501e0e7fcc (MD5) Previous issue date: 2008 | en |
| dc.description.tableofcontents | 口試委員會審定書 i
致謝 ii THESIS ABSTRACT iii 第一章 介紹 1 第二章 相關研究 5 第三章 方法 16 第一節 狀態樣板 16 第二節 PCRE系統架構圖 18 第三節 比較器架構圖 20 第四節 共用字串結構說明 24 第五節 硬體電路設計之共用字串樣版 27 第六節 三大共用字元類別 30 第七節 在前序中使用後序共用 33 第四章 實作過程 37 第一節 PCRE樣式轉Verilog之編譯器流程圖 37 第二節 PCRE之編譯器2項新功能說明 38 第三節 FPGA實作 41 第五章 實驗結果 44 第一節 共用字串功能 44 第二節 共用字串討論 47 第三節 共用前序討論 50 第四節 完整系統效能改善百分比 51 第五節 完整系統效能改善百分比 53 第六章 動態支援設計 55 第一節 動態支援相關研究 55 第二節 動態控制字元樣版 56 第三節 動態控制字元控制 58 第四節 動態設計所達到的空間減少 61 第五節 動態設計空間結論 63 第七章 結論 64 參考文獻 65 | |
| dc.language.iso | zh-TW | |
| dc.subject | 共用字串 | zh_TW |
| dc.subject | 正規表示法 | zh_TW |
| dc.subject | Snort | zh_TW |
| dc.subject | 樣式比對 | zh_TW |
| dc.subject | Snort | en |
| dc.subject | Common string | en |
| dc.subject | Pattern match | en |
| dc.subject | Regular Expression | en |
| dc.title | 具字串共用之正規表示法樣式比對架構 | zh_TW |
| dc.title | A Regular Expression Pattern Matching Architecture with
Common String Sharing Scheme | en |
| dc.type | Thesis | |
| dc.date.schoolyear | 97-2 | |
| dc.description.degree | 碩士 | |
| dc.contributor.oralexamcommittee | 顏嗣鈞,羅佳田,鄭振牟,熊博安 | |
| dc.subject.keyword | 正規表示法,Snort,樣式比對,共用字串, | zh_TW |
| dc.subject.keyword | Regular Expression,Snort,Pattern match,Common string, | en |
| dc.relation.page | 67 | |
| dc.rights.note | 有償授權 | |
| dc.date.accepted | 2009-07-14 | |
| dc.contributor.author-college | 電機資訊學院 | zh_TW |
| dc.contributor.author-dept | 電機工程學研究所 | zh_TW |
| 顯示於系所單位： | 電機工程學系 | |
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| ntu-97-1.pdf 未授權公開取用 | 2.32 MB | Adobe PDF |
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