在網格晶片網路上一種動態調適路由有效率的輸出埠選擇方法

Abstract

隨著晶片製程技術的進步，現今一個晶片已經可以容納大量的電晶體，也因此讓晶片系統(system-on-a-chip)的設計者能將大量的矽智產(intellectual property)置於同一晶片之中。然而，矽智產之間訊息的交換，將成為晶片系統中的一個新的挑戰。為了解決各個矽智產之間的溝通問題，近年來晶片網路(Network-on-a-chip)的架構被提出來，並且擁有良好的延展度以及可靠度的晶片網路上的通訊方式。較高效能的傳輸設計已經變成晶片網路中一個重要的議題。在本篇論文當中，以二維網格晶片網路為基礎，我們提出了一個低面積成本並且減少封包間在輸出埠上的競爭。藉由計算路由選擇上擁塞的機率，我們可以為輸入埠緩衝區選擇一個適合的輸出埠並且可改善晶片網路上傳輸效能。

With the advance of the semiconductor technology, a huge number of transistors are available on a single chip. This advance allows System-on-chip (SoC) designers to put a lot of intellectual property (IP) blocks in a chip. However, the inter-communication between IP cores becomes main challenge of SoC design. In order to overcome the problem, Network-on-chip (NoC) has been proposed to provide a scalable and reliable on-chip infrastructure in recent years. The high performance design is one of the most important issues to Network-on-chip design and the implementation of scalable communication structures. In this thesis, we propose a Single Router Output Port Selection Mechanism (SROPS) for reducing the packets contention for output ports in a 2D mesh NoC router. By calculating the congestion probability of routing selection in a router, SROPS can choose an appropriate output port for the incoming packets. Experiments show that SROPS, when compared with oe-fixed mechanism, improve the saturation point by 68.97% at the scarification of area increase by 2.3%. Also, among others proposed mechanisms (e.g., BL, turn1, turn), this proposed one increase the saturation point performance by 27.15%, 20.82%, and 19.72% respectively.